221bb8a46e
Pull KVM updates from Paolo Bonzini:
- ARM: GICv3 ITS emulation and various fixes. Removal of the
old VGIC implementation.
- s390: support for trapping software breakpoints, nested
virtualization (vSIE), the STHYI opcode, initial extensions
for CPU model support.
- MIPS: support for MIPS64 hosts (32-bit guests only) and lots
of cleanups, preliminary to this and the upcoming support for
hardware virtualization extensions.
- x86: support for execute-only mappings in nested EPT; reduced
vmexit latency for TSC deadline timer (by about 30%) on Intel
hosts; support for more than 255 vCPUs.
- PPC: bugfixes.
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (302 commits)
KVM: PPC: Introduce KVM_CAP_PPC_HTM
MIPS: Select HAVE_KVM for MIPS64_R{2,6}
MIPS: KVM: Reset CP0_PageMask during host TLB flush
MIPS: KVM: Fix ptr->int cast via KVM_GUEST_KSEGX()
MIPS: KVM: Sign extend MFC0/RDHWR results
MIPS: KVM: Fix 64-bit big endian dynamic translation
MIPS: KVM: Fail if ebase doesn't fit in CP0_EBase
MIPS: KVM: Use 64-bit CP0_EBase when appropriate
MIPS: KVM: Set CP0_Status.KX on MIPS64
MIPS: KVM: Make entry code MIPS64 friendly
MIPS: KVM: Use kmap instead of CKSEG0ADDR()
MIPS: KVM: Use virt_to_phys() to get commpage PFN
MIPS: Fix definition of KSEGX() for 64-bit
KVM: VMX: Add VMCS to CPU's loaded VMCSs before VMPTRLD
kvm: x86: nVMX: maintain internal copy of current VMCS
KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE
KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures
KVM: arm64: vgic-its: Simplify MAPI error handling
KVM: arm64: vgic-its: Make vgic_its_cmd_handle_mapi similar to other handlers
KVM: arm64: vgic-its: Turn device_id validation into generic ID validation
...
48 lines
1.1 KiB
C
48 lines
1.1 KiB
C
#ifndef __MMU_H
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#define __MMU_H
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#include <linux/cpumask.h>
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#include <linux/errno.h>
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typedef struct {
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cpumask_t cpu_attach_mask;
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atomic_t flush_count;
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unsigned int flush_mm;
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spinlock_t pgtable_lock;
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struct list_head pgtable_list;
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spinlock_t gmap_lock;
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struct list_head gmap_list;
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unsigned long asce;
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unsigned long asce_limit;
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unsigned long vdso_base;
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/* The mmu context allocates 4K page tables. */
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unsigned int alloc_pgste:1;
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/* The mmu context uses extended page tables. */
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unsigned int has_pgste:1;
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/* The mmu context uses storage keys. */
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unsigned int use_skey:1;
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} mm_context_t;
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#define INIT_MM_CONTEXT(name) \
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.context.pgtable_lock = \
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__SPIN_LOCK_UNLOCKED(name.context.pgtable_lock), \
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.context.pgtable_list = LIST_HEAD_INIT(name.context.pgtable_list), \
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.context.gmap_lock = __SPIN_LOCK_UNLOCKED(name.context.gmap_lock), \
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.context.gmap_list = LIST_HEAD_INIT(name.context.gmap_list),
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static inline int tprot(unsigned long addr)
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{
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int rc = -EFAULT;
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asm volatile(
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" tprot 0(%1),0\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (rc) : "a" (addr) : "cc");
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return rc;
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}
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#endif
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