Pull KVM updates from Paolo Bonzini:
- ARM: GICv3 ITS emulation and various fixes. Removal of the
old VGIC implementation.
- s390: support for trapping software breakpoints, nested
virtualization (vSIE), the STHYI opcode, initial extensions
for CPU model support.
- MIPS: support for MIPS64 hosts (32-bit guests only) and lots
of cleanups, preliminary to this and the upcoming support for
hardware virtualization extensions.
- x86: support for execute-only mappings in nested EPT; reduced
vmexit latency for TSC deadline timer (by about 30%) on Intel
hosts; support for more than 255 vCPUs.
- PPC: bugfixes.
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (302 commits)
KVM: PPC: Introduce KVM_CAP_PPC_HTM
MIPS: Select HAVE_KVM for MIPS64_R{2,6}
MIPS: KVM: Reset CP0_PageMask during host TLB flush
MIPS: KVM: Fix ptr->int cast via KVM_GUEST_KSEGX()
MIPS: KVM: Sign extend MFC0/RDHWR results
MIPS: KVM: Fix 64-bit big endian dynamic translation
MIPS: KVM: Fail if ebase doesn't fit in CP0_EBase
MIPS: KVM: Use 64-bit CP0_EBase when appropriate
MIPS: KVM: Set CP0_Status.KX on MIPS64
MIPS: KVM: Make entry code MIPS64 friendly
MIPS: KVM: Use kmap instead of CKSEG0ADDR()
MIPS: KVM: Use virt_to_phys() to get commpage PFN
MIPS: Fix definition of KSEGX() for 64-bit
KVM: VMX: Add VMCS to CPU's loaded VMCSs before VMPTRLD
kvm: x86: nVMX: maintain internal copy of current VMCS
KVM: PPC: Book3S HV: Save/restore TM state in H_CEDE
KVM: PPC: Book3S HV: Pull out TM state save/restore into separate procedures
KVM: arm64: vgic-its: Simplify MAPI error handling
KVM: arm64: vgic-its: Make vgic_its_cmd_handle_mapi similar to other handlers
KVM: arm64: vgic-its: Turn device_id validation into generic ID validation
...
101 lines
2.8 KiB
C
101 lines
2.8 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM__VIRT_H
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#define __ASM__VIRT_H
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/*
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* The arm64 hcall implementation uses x0 to specify the hcall type. A value
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* less than 0xfff indicates a special hcall, such as get/set vector.
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* Any other value is used as a pointer to the function to call.
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*/
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/* HVC_GET_VECTORS - Return the value of the vbar_el2 register. */
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#define HVC_GET_VECTORS 0
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/*
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* HVC_SET_VECTORS - Set the value of the vbar_el2 register.
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*
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* @x1: Physical address of the new vector table.
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*/
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#define HVC_SET_VECTORS 1
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/*
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* HVC_SOFT_RESTART - CPU soft reset, used by the cpu_soft_restart routine.
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*/
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#define HVC_SOFT_RESTART 2
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#define BOOT_CPU_MODE_EL1 (0xe11)
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#define BOOT_CPU_MODE_EL2 (0xe12)
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#ifndef __ASSEMBLY__
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#include <asm/ptrace.h>
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/*
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* __boot_cpu_mode records what mode CPUs were booted in.
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* A correctly-implemented bootloader must start all CPUs in the same mode:
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* In this case, both 32bit halves of __boot_cpu_mode will contain the
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* same value (either 0 if booted in EL1, BOOT_CPU_MODE_EL2 if booted in EL2).
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*
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* Should the bootloader fail to do this, the two values will be different.
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* This allows the kernel to flag an error when the secondaries have come up.
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*/
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extern u32 __boot_cpu_mode[2];
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void __hyp_set_vectors(phys_addr_t phys_vector_base);
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phys_addr_t __hyp_get_vectors(void);
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/* Reports the availability of HYP mode */
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static inline bool is_hyp_mode_available(void)
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{
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return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 &&
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__boot_cpu_mode[1] == BOOT_CPU_MODE_EL2);
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}
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/* Check if the bootloader has booted CPUs in different modes */
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static inline bool is_hyp_mode_mismatched(void)
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{
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return __boot_cpu_mode[0] != __boot_cpu_mode[1];
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}
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static inline bool is_kernel_in_hyp_mode(void)
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{
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u64 el;
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asm("mrs %0, CurrentEL" : "=r" (el));
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return el == CurrentEL_EL2;
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}
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#ifdef CONFIG_ARM64_VHE
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extern void verify_cpu_run_el(void);
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#else
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static inline void verify_cpu_run_el(void) {}
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#endif
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/* The section containing the hypervisor idmap text */
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extern char __hyp_idmap_text_start[];
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extern char __hyp_idmap_text_end[];
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/* The section containing the hypervisor text */
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extern char __hyp_text_start[];
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extern char __hyp_text_end[];
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#endif /* __ASSEMBLY__ */
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#endif /* ! __ASM__VIRT_H */
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