Manuel Lauss 474402291a MIPS: Alchemy: clock framework integration of onchip clocks ... This patch introduces common clock framework integration for all configurable on-chip clocks on Alchemy chips: - 2 or 3 PLLs which generate integer multiples of the root rate 12MHz, - 6 dividers which take one of the 3 PLLs as input and divide their rate by either multiples of 2 or 1 (Au1300). - another bank of up to 6 muxes which take either one of the 6 above dividers or one of the PLLs directly and divide their rate further by 1, 2, 3 or 4. - a few other sources which are used by onchip peripherals and are informational. This implementation will take the clock tree as it was set up by boot firmware: all in-kernel boards should continue to work without having to set up the clock tree in board code. CLK_IGNORE_DISABLED will be removed once all drivers have been converted. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7466/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2014-07-30 14:08:42 +02:00
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common	MIPS: Alchemy: clock framework integration of onchip clocks	2014-07-30 14:08:42 +02:00
devboards	MIPS: Alchemy: add helpers to access static memory ctrl registers.	2014-07-30 13:53:52 +02:00
board-gpr.c	MIPS: Alchemy: Fix unchecked kstrtoul return value	2014-03-06 20:52:28 +01:00
board-mtx1.c	MIPS: Alchemy: introduce helpers to access SYS register block.	2014-07-30 13:53:28 +02:00
board-xxs1500.c	MIPS: Alchemy: introduce helpers to access SYS register block.	2014-07-30 13:53:28 +02:00
Kconfig	MIPS: Alchemy: Unify Devboard support.	2014-03-26 23:09:21 +01:00
Makefile	MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single files	2011-12-07 22:02:06 +00:00
Platform	MIPS: Alchemy: Unify Devboard support.	2014-03-26 23:09:21 +01:00