linux/drivers/gpu
Chris Wilson 46f0f8d120 drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSH
On gen2 MI_EXE_FLUSH is actually an AGP flush bit and on gen3 marked as
reserved.  On both it is documented as being must-be-zero. So obey the
documentation, and separate the gen2 flush into its own little routine
and share with gen3.

This means that we can rename the existing render_ring_flush() to
reflect the generation from which it first applies and remove the code
for handling earlier generations from it.

v2: Applies to gen3 as well
v3: Make it compile and improve the commit message.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-04-18 12:39:57 +02:00
..
drm drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSH 2012-04-18 12:39:57 +02:00
stub i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO 2011-04-13 09:10:25 +10:00
vga drivers/gpu/vga/vgaarb.c: add missing kfree 2011-11-22 20:21:10 +00:00
Makefile gpu: Add Intel GMA500(Poulsbo) Stub Driver 2010-10-26 11:00:13 +10:00