forked from Minki/linux
51dd709fee
Using an si_code of 0 that aliases with SI_USER is clearly the wrong thing todo, and causes problems in interesting ways. The newly defined FPE_FLTUNK semantically appears to fit the bill so use it instead. Given recent experience in this area odds are it will not break anything. Fixing it removes a hazard to kernel maintenance. Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: linux-ia64@vger.kernel.org Fixes: 987159266c45 ("Linux version 2.3.48") Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
679 lines
18 KiB
C
679 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Architecture-specific trap handling.
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched/signal.h>
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#include <linux/sched/debug.h>
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#include <linux/tty.h>
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#include <linux/vt_kern.h> /* For unblank_screen() */
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#include <linux/export.h>
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#include <linux/extable.h>
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#include <linux/hardirq.h>
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#include <linux/kprobes.h>
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#include <linux/delay.h> /* for ssleep() */
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#include <linux/kdebug.h>
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#include <linux/uaccess.h>
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#include <asm/fpswa.h>
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#include <asm/intrinsics.h>
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#include <asm/processor.h>
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#include <asm/exception.h>
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#include <asm/setup.h>
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fpswa_interface_t *fpswa_interface;
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EXPORT_SYMBOL(fpswa_interface);
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void __init
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trap_init (void)
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{
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if (ia64_boot_param->fpswa)
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/* FPSWA fixup: make the interface pointer a kernel virtual address: */
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fpswa_interface = __va(ia64_boot_param->fpswa);
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}
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int
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die (const char *str, struct pt_regs *regs, long err)
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{
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static struct {
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spinlock_t lock;
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u32 lock_owner;
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int lock_owner_depth;
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} die = {
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.lock = __SPIN_LOCK_UNLOCKED(die.lock),
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.lock_owner = -1,
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.lock_owner_depth = 0
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};
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static int die_counter;
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int cpu = get_cpu();
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if (die.lock_owner != cpu) {
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console_verbose();
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spin_lock_irq(&die.lock);
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die.lock_owner = cpu;
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die.lock_owner_depth = 0;
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bust_spinlocks(1);
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}
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put_cpu();
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if (++die.lock_owner_depth < 3) {
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printk("%s[%d]: %s %ld [%d]\n",
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current->comm, task_pid_nr(current), str, err, ++die_counter);
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if (notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV)
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!= NOTIFY_STOP)
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show_regs(regs);
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else
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regs = NULL;
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} else
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printk(KERN_ERR "Recursive die() failure, output suppressed\n");
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bust_spinlocks(0);
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die.lock_owner = -1;
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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spin_unlock_irq(&die.lock);
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if (!regs)
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return 1;
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if (panic_on_oops)
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panic("Fatal exception");
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do_exit(SIGSEGV);
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return 0;
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}
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int
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die_if_kernel (char *str, struct pt_regs *regs, long err)
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{
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if (!user_mode(regs))
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return die(str, regs, err);
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return 0;
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}
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void
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__kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
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{
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siginfo_t siginfo;
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int sig, code;
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/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
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clear_siginfo(&siginfo);
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siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
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siginfo.si_imm = break_num;
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siginfo.si_flags = 0; /* clear __ISR_VALID */
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siginfo.si_isr = 0;
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switch (break_num) {
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case 0: /* unknown error (used by GCC for __builtin_abort()) */
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if (notify_die(DIE_BREAK, "break 0", regs, break_num, TRAP_BRKPT, SIGTRAP)
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== NOTIFY_STOP)
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return;
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if (die_if_kernel("bugcheck!", regs, break_num))
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return;
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sig = SIGILL; code = ILL_ILLOPC;
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break;
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case 1: /* integer divide by zero */
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sig = SIGFPE; code = FPE_INTDIV;
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break;
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case 2: /* integer overflow */
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sig = SIGFPE; code = FPE_INTOVF;
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break;
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case 3: /* range check/bounds check */
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sig = SIGFPE; code = FPE_FLTSUB;
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break;
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case 4: /* null pointer dereference */
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sig = SIGSEGV; code = SEGV_MAPERR;
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break;
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case 5: /* misaligned data */
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sig = SIGSEGV; code = BUS_ADRALN;
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break;
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case 6: /* decimal overflow */
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sig = SIGFPE; code = __FPE_DECOVF;
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break;
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case 7: /* decimal divide by zero */
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sig = SIGFPE; code = __FPE_DECDIV;
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break;
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case 8: /* packed decimal error */
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sig = SIGFPE; code = __FPE_DECERR;
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break;
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case 9: /* invalid ASCII digit */
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sig = SIGFPE; code = __FPE_INVASC;
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break;
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case 10: /* invalid decimal digit */
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sig = SIGFPE; code = __FPE_INVDEC;
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break;
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case 11: /* paragraph stack overflow */
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sig = SIGSEGV; code = __SEGV_PSTKOVF;
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break;
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case 0x3f000 ... 0x3ffff: /* bundle-update in progress */
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sig = SIGILL; code = __ILL_BNDMOD;
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break;
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default:
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if ((break_num < 0x40000 || break_num > 0x100000)
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&& die_if_kernel("Bad break", regs, break_num))
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return;
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if (break_num < 0x80000) {
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sig = SIGILL; code = __ILL_BREAK;
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} else {
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if (notify_die(DIE_BREAK, "bad break", regs, break_num, TRAP_BRKPT, SIGTRAP)
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== NOTIFY_STOP)
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return;
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sig = SIGTRAP; code = TRAP_BRKPT;
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}
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}
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siginfo.si_signo = sig;
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siginfo.si_errno = 0;
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siginfo.si_code = code;
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force_sig_info(sig, &siginfo, current);
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}
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/*
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* disabled_fph_fault() is called when a user-level process attempts to access f32..f127
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* and it doesn't own the fp-high register partition. When this happens, we save the
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* current fph partition in the task_struct of the fpu-owner (if necessary) and then load
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* the fp-high partition of the current task (if necessary). Note that the kernel has
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* access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes
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* care of clearing psr.dfh.
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*/
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static inline void
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disabled_fph_fault (struct pt_regs *regs)
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{
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struct ia64_psr *psr = ia64_psr(regs);
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/* first, grant user-level access to fph partition: */
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psr->dfh = 0;
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/*
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* Make sure that no other task gets in on this processor
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* while we're claiming the FPU
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*/
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preempt_disable();
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#ifndef CONFIG_SMP
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{
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struct task_struct *fpu_owner
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= (struct task_struct *)ia64_get_kr(IA64_KR_FPU_OWNER);
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if (ia64_is_local_fpu_owner(current)) {
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preempt_enable_no_resched();
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return;
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}
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if (fpu_owner)
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ia64_flush_fph(fpu_owner);
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}
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#endif /* !CONFIG_SMP */
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ia64_set_local_fpu_owner(current);
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if ((current->thread.flags & IA64_THREAD_FPH_VALID) != 0) {
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__ia64_load_fpu(current->thread.fph);
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psr->mfh = 0;
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} else {
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__ia64_init_fpu();
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/*
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* Set mfh because the state in thread.fph does not match the state in
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* the fph partition.
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*/
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psr->mfh = 1;
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}
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preempt_enable_no_resched();
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}
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static inline int
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fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,
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struct pt_regs *regs)
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{
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fp_state_t fp_state;
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fpswa_ret_t ret;
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if (!fpswa_interface)
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return -1;
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memset(&fp_state, 0, sizeof(fp_state_t));
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/*
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* compute fp_state. only FP registers f6 - f11 are used by the
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* kernel, so set those bits in the mask and set the low volatile
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* pointer to point to these registers.
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*/
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fp_state.bitmask_low64 = 0xfc0; /* bit6..bit11 */
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fp_state.fp_state_low_volatile = (fp_state_low_volatile_t *) ®s->f6;
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/*
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* unsigned long (*EFI_FPSWA) (
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* unsigned long trap_type,
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* void *Bundle,
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* unsigned long *pipsr,
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* unsigned long *pfsr,
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* unsigned long *pisr,
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* unsigned long *ppreds,
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* unsigned long *pifs,
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* void *fp_state);
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*/
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ret = (*fpswa_interface->fpswa)((unsigned long) fp_fault, bundle,
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(unsigned long *) ipsr, (unsigned long *) fpsr,
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(unsigned long *) isr, (unsigned long *) pr,
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(unsigned long *) ifs, &fp_state);
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return ret.status;
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}
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struct fpu_swa_msg {
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unsigned long count;
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unsigned long time;
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};
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static DEFINE_PER_CPU(struct fpu_swa_msg, cpulast);
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DECLARE_PER_CPU(struct fpu_swa_msg, cpulast);
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static struct fpu_swa_msg last __cacheline_aligned;
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/*
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* Handle floating-point assist faults and traps.
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*/
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static int
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handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
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{
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long exception, bundle[2];
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unsigned long fault_ip;
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fault_ip = regs->cr_iip;
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if (!fp_fault && (ia64_psr(regs)->ri == 0))
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fault_ip -= 16;
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if (copy_from_user(bundle, (void __user *) fault_ip, sizeof(bundle)))
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return -1;
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if (!(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT)) {
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unsigned long count, current_jiffies = jiffies;
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struct fpu_swa_msg *cp = this_cpu_ptr(&cpulast);
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if (unlikely(current_jiffies > cp->time))
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cp->count = 0;
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if (unlikely(cp->count < 5)) {
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cp->count++;
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cp->time = current_jiffies + 5 * HZ;
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/* minimize races by grabbing a copy of count BEFORE checking last.time. */
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count = last.count;
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barrier();
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/*
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* Lower 4 bits are used as a count. Upper bits are a sequence
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* number that is updated when count is reset. The cmpxchg will
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* fail is seqno has changed. This minimizes mutiple cpus
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* resetting the count.
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*/
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if (current_jiffies > last.time)
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(void) cmpxchg_acq(&last.count, count, 16 + (count & ~15));
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/* used fetchadd to atomically update the count */
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if ((last.count & 15) < 5 && (ia64_fetchadd(1, &last.count, acq) & 15) < 5) {
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last.time = current_jiffies + 5 * HZ;
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printk(KERN_WARNING
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"%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
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current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr);
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}
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}
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}
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exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr,
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®s->cr_ifs, regs);
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if (fp_fault) {
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if (exception == 0) {
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/* emulation was successful */
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ia64_increment_ip(regs);
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} else if (exception == -1) {
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printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
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return -1;
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} else {
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struct siginfo siginfo;
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/* is next instruction a trap? */
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if (exception & 2) {
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ia64_increment_ip(regs);
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}
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clear_siginfo(&siginfo);
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siginfo.si_signo = SIGFPE;
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siginfo.si_errno = 0;
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siginfo.si_code = FPE_FLTUNK; /* default code */
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siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
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if (isr & 0x11) {
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siginfo.si_code = FPE_FLTINV;
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} else if (isr & 0x22) {
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/* denormal operand gets the same si_code as underflow
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* see arch/i386/kernel/traps.c:math_error() */
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siginfo.si_code = FPE_FLTUND;
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} else if (isr & 0x44) {
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siginfo.si_code = FPE_FLTDIV;
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}
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siginfo.si_isr = isr;
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siginfo.si_flags = __ISR_VALID;
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siginfo.si_imm = 0;
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force_sig_info(SIGFPE, &siginfo, current);
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}
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} else {
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if (exception == -1) {
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printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
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return -1;
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} else if (exception != 0) {
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/* raise exception */
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struct siginfo siginfo;
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clear_siginfo(&siginfo);
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siginfo.si_signo = SIGFPE;
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siginfo.si_errno = 0;
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siginfo.si_code = FPE_FLTUNK; /* default code */
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siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
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if (isr & 0x880) {
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siginfo.si_code = FPE_FLTOVF;
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} else if (isr & 0x1100) {
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siginfo.si_code = FPE_FLTUND;
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} else if (isr & 0x2200) {
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siginfo.si_code = FPE_FLTRES;
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}
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siginfo.si_isr = isr;
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siginfo.si_flags = __ISR_VALID;
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siginfo.si_imm = 0;
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force_sig_info(SIGFPE, &siginfo, current);
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}
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}
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return 0;
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}
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struct illegal_op_return {
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unsigned long fkt, arg1, arg2, arg3;
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};
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struct illegal_op_return
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ia64_illegal_op_fault (unsigned long ec, long arg1, long arg2, long arg3,
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long arg4, long arg5, long arg6, long arg7,
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struct pt_regs regs)
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{
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struct illegal_op_return rv;
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struct siginfo si;
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char buf[128];
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#ifdef CONFIG_IA64_BRL_EMU
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{
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extern struct illegal_op_return ia64_emulate_brl (struct pt_regs *, unsigned long);
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rv = ia64_emulate_brl(®s, ec);
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if (rv.fkt != (unsigned long) -1)
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return rv;
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}
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#endif
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sprintf(buf, "IA-64 Illegal operation fault");
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rv.fkt = 0;
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if (die_if_kernel(buf, ®s, 0))
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return rv;
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clear_siginfo(&si);
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si.si_signo = SIGILL;
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si.si_code = ILL_ILLOPC;
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si.si_addr = (void __user *) (regs.cr_iip + ia64_psr(®s)->ri);
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force_sig_info(SIGILL, &si, current);
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return rv;
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}
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void __kprobes
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ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
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unsigned long iim, unsigned long itir, long arg5, long arg6,
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long arg7, struct pt_regs regs)
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{
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unsigned long code, error = isr, iip;
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char buf[128];
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int result, sig;
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static const char *reason[] = {
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"IA-64 Illegal Operation fault",
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"IA-64 Privileged Operation fault",
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"IA-64 Privileged Register fault",
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"IA-64 Reserved Register/Field fault",
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"Disabled Instruction Set Transition fault",
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"Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
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"Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
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"Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
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};
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if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {
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/*
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* This fault was due to lfetch.fault, set "ed" bit in the psr to cancel
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* the lfetch.
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*/
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ia64_psr(®s)->ed = 1;
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return;
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}
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iip = regs.cr_iip + ia64_psr(®s)->ri;
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switch (vector) {
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case 24: /* General Exception */
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code = (isr >> 4) & 0xf;
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sprintf(buf, "General Exception: %s%s", reason[code],
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(code == 3) ? ((isr & (1UL << 37))
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? " (RSE access)" : " (data access)") : "");
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if (code == 8) {
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# ifdef CONFIG_IA64_PRINT_HAZARDS
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printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n",
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current->comm, task_pid_nr(current),
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regs.cr_iip + ia64_psr(®s)->ri, regs.pr);
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# endif
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return;
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}
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break;
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case 25: /* Disabled FP-Register */
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if (isr & 2) {
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disabled_fph_fault(®s);
|
|
return;
|
|
}
|
|
sprintf(buf, "Disabled FPL fault---not supposed to happen!");
|
|
break;
|
|
|
|
case 26: /* NaT Consumption */
|
|
if (user_mode(®s)) {
|
|
struct siginfo siginfo;
|
|
void __user *addr;
|
|
|
|
if (((isr >> 4) & 0xf) == 2) {
|
|
/* NaT page consumption */
|
|
sig = SIGSEGV;
|
|
code = SEGV_ACCERR;
|
|
addr = (void __user *) ifa;
|
|
} else {
|
|
/* register NaT consumption */
|
|
sig = SIGILL;
|
|
code = ILL_ILLOPN;
|
|
addr = (void __user *) (regs.cr_iip
|
|
+ ia64_psr(®s)->ri);
|
|
}
|
|
clear_siginfo(&siginfo);
|
|
siginfo.si_signo = sig;
|
|
siginfo.si_code = code;
|
|
siginfo.si_errno = 0;
|
|
siginfo.si_addr = addr;
|
|
siginfo.si_imm = vector;
|
|
siginfo.si_flags = __ISR_VALID;
|
|
siginfo.si_isr = isr;
|
|
force_sig_info(sig, &siginfo, current);
|
|
return;
|
|
} else if (ia64_done_with_exception(®s))
|
|
return;
|
|
sprintf(buf, "NaT consumption");
|
|
break;
|
|
|
|
case 31: /* Unsupported Data Reference */
|
|
if (user_mode(®s)) {
|
|
struct siginfo siginfo;
|
|
|
|
clear_siginfo(&siginfo);
|
|
siginfo.si_signo = SIGILL;
|
|
siginfo.si_code = ILL_ILLOPN;
|
|
siginfo.si_errno = 0;
|
|
siginfo.si_addr = (void __user *) iip;
|
|
siginfo.si_imm = vector;
|
|
siginfo.si_flags = __ISR_VALID;
|
|
siginfo.si_isr = isr;
|
|
force_sig_info(SIGILL, &siginfo, current);
|
|
return;
|
|
}
|
|
sprintf(buf, "Unsupported data reference");
|
|
break;
|
|
|
|
case 29: /* Debug */
|
|
case 35: /* Taken Branch Trap */
|
|
case 36: /* Single Step Trap */
|
|
{
|
|
struct siginfo siginfo;
|
|
|
|
clear_siginfo(&siginfo);
|
|
if (fsys_mode(current, ®s)) {
|
|
extern char __kernel_syscall_via_break[];
|
|
/*
|
|
* Got a trap in fsys-mode: Taken Branch Trap
|
|
* and Single Step trap need special handling;
|
|
* Debug trap is ignored (we disable it here
|
|
* and re-enable it in the lower-privilege trap).
|
|
*/
|
|
if (unlikely(vector == 29)) {
|
|
set_thread_flag(TIF_DB_DISABLED);
|
|
ia64_psr(®s)->db = 0;
|
|
ia64_psr(®s)->lp = 1;
|
|
return;
|
|
}
|
|
/* re-do the system call via break 0x100000: */
|
|
regs.cr_iip = (unsigned long) __kernel_syscall_via_break;
|
|
ia64_psr(®s)->ri = 0;
|
|
ia64_psr(®s)->cpl = 3;
|
|
return;
|
|
}
|
|
switch (vector) {
|
|
default:
|
|
case 29:
|
|
siginfo.si_code = TRAP_HWBKPT;
|
|
#ifdef CONFIG_ITANIUM
|
|
/*
|
|
* Erratum 10 (IFA may contain incorrect address) now has
|
|
* "NoFix" status. There are no plans for fixing this.
|
|
*/
|
|
if (ia64_psr(®s)->is == 0)
|
|
ifa = regs.cr_iip;
|
|
#endif
|
|
break;
|
|
case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break;
|
|
case 36: siginfo.si_code = TRAP_TRACE; ifa = 0; break;
|
|
}
|
|
if (notify_die(DIE_FAULT, "ia64_fault", ®s, vector, siginfo.si_code, SIGTRAP)
|
|
== NOTIFY_STOP)
|
|
return;
|
|
siginfo.si_signo = SIGTRAP;
|
|
siginfo.si_errno = 0;
|
|
siginfo.si_addr = (void __user *) ifa;
|
|
siginfo.si_imm = 0;
|
|
siginfo.si_flags = __ISR_VALID;
|
|
siginfo.si_isr = isr;
|
|
force_sig_info(SIGTRAP, &siginfo, current);
|
|
return;
|
|
}
|
|
|
|
case 32: /* fp fault */
|
|
case 33: /* fp trap */
|
|
result = handle_fpu_swa((vector == 32) ? 1 : 0, ®s, isr);
|
|
if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) {
|
|
struct siginfo siginfo;
|
|
|
|
clear_siginfo(&siginfo);
|
|
siginfo.si_signo = SIGFPE;
|
|
siginfo.si_errno = 0;
|
|
siginfo.si_code = FPE_FLTINV;
|
|
siginfo.si_addr = (void __user *) iip;
|
|
siginfo.si_flags = __ISR_VALID;
|
|
siginfo.si_isr = isr;
|
|
siginfo.si_imm = 0;
|
|
force_sig_info(SIGFPE, &siginfo, current);
|
|
}
|
|
return;
|
|
|
|
case 34:
|
|
if (isr & 0x2) {
|
|
/* Lower-Privilege Transfer Trap */
|
|
|
|
/* If we disabled debug traps during an fsyscall,
|
|
* re-enable them here.
|
|
*/
|
|
if (test_thread_flag(TIF_DB_DISABLED)) {
|
|
clear_thread_flag(TIF_DB_DISABLED);
|
|
ia64_psr(®s)->db = 1;
|
|
}
|
|
|
|
/*
|
|
* Just clear PSR.lp and then return immediately:
|
|
* all the interesting work (e.g., signal delivery)
|
|
* is done in the kernel exit path.
|
|
*/
|
|
ia64_psr(®s)->lp = 0;
|
|
return;
|
|
} else {
|
|
/* Unimplemented Instr. Address Trap */
|
|
if (user_mode(®s)) {
|
|
struct siginfo siginfo;
|
|
|
|
clear_siginfo(&siginfo);
|
|
siginfo.si_signo = SIGILL;
|
|
siginfo.si_code = ILL_BADIADDR;
|
|
siginfo.si_errno = 0;
|
|
siginfo.si_flags = 0;
|
|
siginfo.si_isr = 0;
|
|
siginfo.si_imm = 0;
|
|
siginfo.si_addr = (void __user *) iip;
|
|
force_sig_info(SIGILL, &siginfo, current);
|
|
return;
|
|
}
|
|
sprintf(buf, "Unimplemented Instruction Address fault");
|
|
}
|
|
break;
|
|
|
|
case 45:
|
|
printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n");
|
|
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
|
|
iip, ifa, isr);
|
|
force_sig(SIGSEGV, current);
|
|
return;
|
|
|
|
case 46:
|
|
printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n");
|
|
printk(KERN_ERR " iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
|
|
iip, ifa, isr, iim);
|
|
force_sig(SIGSEGV, current);
|
|
return;
|
|
|
|
case 47:
|
|
sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);
|
|
break;
|
|
|
|
default:
|
|
sprintf(buf, "Fault %lu", vector);
|
|
break;
|
|
}
|
|
if (!die_if_kernel(buf, ®s, error))
|
|
force_sig(SIGILL, current);
|
|
}
|