forked from Minki/linux
096b7bdc86
All these files use the big kernel lock in a trivial way to serialize their private file operations, typically resulting from an earlier semi-automatic pushdown from VFS. None of these drivers appears to want to lock against other code, and they all use the BKL as the top-level lock in their file operations, meaning that there is no lock-order inversion problem. Consequently, we can remove the BKL completely, replacing it with a per-file mutex in every case. Using a scripted approach means we can avoid typos. file=$1 name=$2 if grep -q lock_kernel ${file} ; then if grep -q 'include.*linux.mutex.h' ${file} ; then sed -i '/include.*<linux\/smp_lock.h>/d' ${file} else sed -i 's/include.*<linux\/smp_lock.h>.*$/include <linux\/mutex.h>/g' ${file} fi sed -i ${file} \ -e "/^#include.*linux.mutex.h/,$ { 1,/^\(static\|int\|long\)/ { /^\(static\|int\|long\)/istatic DEFINE_MUTEX(${name}_mutex); } }" \ -e "s/\(un\)*lock_kernel\>[ ]*()/mutex_\1lock(\&${name}_mutex)/g" \ -e '/[ ]*cycle_kernel_lock();/d' else sed -i -e '/include.*\<smp_lock.h\>/d' ${file} \ -e '/cycle_kernel_lock()/d' fi Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
752 lines
14 KiB
C
752 lines
14 KiB
C
/*!***************************************************************************
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*!
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*! FILE NAME : i2c.c
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*!
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*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
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*! kernel modules (i2c_writereg/readreg) and from userspace using
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*! ioctl()'s
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*!
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*! Nov 30 1998 Torbjorn Eliasson Initial version.
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*! Bjorn Wesen Elinux kernel version.
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*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
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*! don't use PB_I2C if DS1302 uses same bits,
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*! use PB.
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*| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
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*| generates nack on last received byte,
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*| instead of ack.
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*| i2c_getack changed data level while clock
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*| was high, causing DS75 to see a stop condition
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*!
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*! ---------------------------------------------------------------------------
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*!
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*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
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*!
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*!***************************************************************************/
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/****************** INCLUDE FILES SECTION ***********************************/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <asm/etraxi2c.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/delay.h>
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#include "i2c.h"
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/****************** I2C DEFINITION SECTION *************************/
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#define D(x)
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#define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
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static DEFINE_MUTEX(i2c_mutex);
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static const char i2c_name[] = "i2c";
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#define CLOCK_LOW_TIME 8
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#define CLOCK_HIGH_TIME 8
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#define START_CONDITION_HOLD_TIME 8
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#define STOP_CONDITION_HOLD_TIME 8
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#define ENABLE_OUTPUT 0x01
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#define ENABLE_INPUT 0x00
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#define I2C_CLOCK_HIGH 1
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#define I2C_CLOCK_LOW 0
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#define I2C_DATA_HIGH 1
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#define I2C_DATA_LOW 0
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#define i2c_enable()
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#define i2c_disable()
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/* enable or disable output-enable, to select output or input on the i2c bus */
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#define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
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#define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
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/* control the i2c clock and data signals */
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#define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
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#define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
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/* read a bit from the i2c interface */
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#define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
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#define i2c_delay(usecs) udelay(usecs)
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static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
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/****************** VARIABLE SECTION ************************************/
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static struct crisv32_iopin cris_i2c_clk;
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static struct crisv32_iopin cris_i2c_data;
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/****************** FUNCTION DEFINITION SECTION *************************/
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/* generate i2c start condition */
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void
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i2c_start(void)
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{
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/*
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* SCL=1 SDA=1
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*/
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i2c_dir_out();
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_data(I2C_DATA_HIGH);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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/*
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* SCL=1 SDA=0
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*/
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i2c_data(I2C_DATA_LOW);
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i2c_delay(START_CONDITION_HOLD_TIME);
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/*
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* SCL=0 SDA=0
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*/
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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}
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/* generate i2c stop condition */
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void
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i2c_stop(void)
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{
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i2c_dir_out();
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/*
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* SCL=0 SDA=0
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*/
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i2c_clk(I2C_CLOCK_LOW);
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i2c_data(I2C_DATA_LOW);
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i2c_delay(CLOCK_LOW_TIME*2);
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/*
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* SCL=1 SDA=0
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*/
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME*2);
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/*
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* SCL=1 SDA=1
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(STOP_CONDITION_HOLD_TIME);
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i2c_dir_in();
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}
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/* write a byte to the i2c interface */
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void
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i2c_outbyte(unsigned char x)
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{
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int i;
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i2c_dir_out();
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for (i = 0; i < 8; i++) {
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if (x & 0x80) {
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i2c_data(I2C_DATA_HIGH);
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} else {
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i2c_data(I2C_DATA_LOW);
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}
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i2c_delay(CLOCK_LOW_TIME/2);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME/2);
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x <<= 1;
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}
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i2c_data(I2C_DATA_LOW);
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i2c_delay(CLOCK_LOW_TIME/2);
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/*
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* enable input
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*/
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i2c_dir_in();
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}
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/* read a byte from the i2c interface */
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unsigned char
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i2c_inbyte(void)
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{
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unsigned char aBitByte = 0;
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int i;
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/* Switch off I2C to get bit */
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i2c_disable();
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/2);
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/* Get bit */
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aBitByte |= i2c_getbit();
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/* Enable I2C */
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i2c_enable();
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i2c_delay(CLOCK_LOW_TIME/2);
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for (i = 1; i < 8; i++) {
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aBitByte <<= 1;
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/* Clock pulse */
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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/* Switch off I2C to get bit */
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i2c_disable();
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/2);
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/* Get bit */
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aBitByte |= i2c_getbit();
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/* Enable I2C */
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i2c_enable();
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i2c_delay(CLOCK_LOW_TIME/2);
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}
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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/*
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* we leave the clock low, getbyte is usually followed
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* by sendack/nack, they assume the clock to be low
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*/
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i2c_clk(I2C_CLOCK_LOW);
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return aBitByte;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_getack
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*#
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*# DESCRIPTION : checks if ack was received from ic2
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_getack(void)
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{
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int ack = 1;
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/*
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* enable output
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*/
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i2c_dir_out();
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/*
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* Release data bus by setting
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* data high
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*/
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i2c_data(I2C_DATA_HIGH);
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/*
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* enable input
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*/
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i2c_dir_in();
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i2c_delay(CLOCK_HIGH_TIME/4);
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/*
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* generate ACK clock pulse
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*/
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i2c_clk(I2C_CLOCK_HIGH);
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#if 0
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/*
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* Use PORT PB instead of I2C
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* for input. (I2C not working)
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*/
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i2c_clk(1);
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i2c_data(1);
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/*
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* switch off I2C
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*/
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i2c_data(1);
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i2c_disable();
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i2c_dir_in();
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#endif
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/*
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* now wait for ack
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*/
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i2c_delay(CLOCK_HIGH_TIME/2);
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/*
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* check for ack
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*/
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if (i2c_getbit())
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ack = 0;
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i2c_delay(CLOCK_HIGH_TIME/2);
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if (!ack) {
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if (!i2c_getbit()) /* receiver pulld SDA low */
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ack = 1;
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i2c_delay(CLOCK_HIGH_TIME/2);
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}
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/*
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* our clock is high now, make sure data is low
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* before we enable our output. If we keep data high
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* and enable output, we would generate a stop condition.
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*/
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#if 0
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i2c_data(I2C_DATA_LOW);
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/*
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* end clock pulse
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*/
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i2c_enable();
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i2c_dir_out();
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#endif
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_HIGH_TIME/4);
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/*
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* enable output
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*/
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i2c_dir_out();
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/*
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* remove ACK clock pulse
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(CLOCK_LOW_TIME/2);
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return ack;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: I2C::sendAck
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*#
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*# DESCRIPTION : Send ACK on received data
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*#
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*#--------------------------------------------------------------------------*/
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void
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i2c_sendack(void)
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{
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/*
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* enable output
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*/
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_out();
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/*
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* set ack pulse high
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*/
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i2c_data(I2C_DATA_LOW);
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/*
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* generate clock pulse
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*/
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME/6);
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/*
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* reset data out
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*/
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i2c_data(I2C_DATA_HIGH);
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_in();
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_sendnack
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*#
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*# DESCRIPTION : Sends NACK on received data
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*#
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*#--------------------------------------------------------------------------*/
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void
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i2c_sendnack(void)
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{
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/*
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* enable output
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*/
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_out();
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/*
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* set data high
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*/
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i2c_data(I2C_DATA_HIGH);
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/*
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* generate clock pulse
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*/
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i2c_delay(CLOCK_HIGH_TIME/6);
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i2c_clk(I2C_CLOCK_HIGH);
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i2c_delay(CLOCK_HIGH_TIME);
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i2c_clk(I2C_CLOCK_LOW);
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i2c_delay(CLOCK_LOW_TIME);
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i2c_dir_in();
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_write
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*#
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*# DESCRIPTION : Writes a value to an I2C device
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_write(unsigned char theSlave, void *data, size_t nbytes)
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{
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int error, cntr = 3;
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unsigned char bytes_wrote = 0;
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unsigned char value;
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unsigned long flags;
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spin_lock_irqsave(&i2c_lock, flags);
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do {
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error = 0;
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i2c_start();
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/*
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* send slave address
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*/
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i2c_outbyte((theSlave & 0xfe));
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/*
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* wait for ack
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*/
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if (!i2c_getack())
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error = 1;
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/*
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* send data
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*/
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for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
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memcpy(&value, data + bytes_wrote, sizeof value);
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i2c_outbyte(value);
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/*
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* now it's time to wait for ack
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*/
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if (!i2c_getack())
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error |= 4;
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}
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/*
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* end byte stream
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*/
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i2c_stop();
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} while (error && cntr--);
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i2c_delay(CLOCK_LOW_TIME);
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spin_unlock_irqrestore(&i2c_lock, flags);
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return -error;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_read
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*#
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*# DESCRIPTION : Reads a value from an I2C device
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_read(unsigned char theSlave, void *data, size_t nbytes)
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{
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unsigned char b = 0;
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unsigned char bytes_read = 0;
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int error, cntr = 3;
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unsigned long flags;
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spin_lock_irqsave(&i2c_lock, flags);
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do {
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error = 0;
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memset(data, 0, nbytes);
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/*
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* generate start condition
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*/
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i2c_start();
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/*
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* send slave address
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*/
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i2c_outbyte((theSlave | 0x01));
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/*
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* wait for ack
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*/
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if (!i2c_getack())
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error = 1;
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/*
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* fetch data
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*/
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for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
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b = i2c_inbyte();
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memcpy(data + bytes_read, &b, sizeof b);
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if (bytes_read < (nbytes - 1))
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i2c_sendack();
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}
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/*
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* last received byte needs to be nacked
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* instead of acked
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*/
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i2c_sendnack();
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/*
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* end sequence
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*/
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i2c_stop();
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} while (error && cntr--);
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spin_unlock_irqrestore(&i2c_lock, flags);
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return -error;
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}
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/*#---------------------------------------------------------------------------
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*#
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*# FUNCTION NAME: i2c_writereg
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*#
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*# DESCRIPTION : Writes a value to an I2C device
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*#
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*#--------------------------------------------------------------------------*/
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int
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i2c_writereg(unsigned char theSlave, unsigned char theReg,
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unsigned char theValue)
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{
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int error, cntr = 3;
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unsigned long flags;
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spin_lock_irqsave(&i2c_lock, flags);
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do {
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error = 0;
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i2c_start();
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/*
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* send slave address
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*/
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i2c_outbyte((theSlave & 0xfe));
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/*
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* wait for ack
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*/
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if(!i2c_getack())
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error = 1;
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/*
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* now select register
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*/
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i2c_dir_out();
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i2c_outbyte(theReg);
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/*
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* now it's time to wait for ack
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*/
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if(!i2c_getack())
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error |= 2;
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/*
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* send register register data
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*/
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i2c_outbyte(theValue);
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/*
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* now it's time to wait for ack
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*/
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if(!i2c_getack())
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error |= 4;
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/*
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* end byte stream
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*/
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i2c_stop();
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} while(error && cntr--);
|
|
|
|
i2c_delay(CLOCK_LOW_TIME);
|
|
|
|
spin_unlock_irqrestore(&i2c_lock, flags);
|
|
|
|
return -error;
|
|
}
|
|
|
|
/*#---------------------------------------------------------------------------
|
|
*#
|
|
*# FUNCTION NAME: i2c_readreg
|
|
*#
|
|
*# DESCRIPTION : Reads a value from the decoder registers.
|
|
*#
|
|
*#--------------------------------------------------------------------------*/
|
|
unsigned char
|
|
i2c_readreg(unsigned char theSlave, unsigned char theReg)
|
|
{
|
|
unsigned char b = 0;
|
|
int error, cntr = 3;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&i2c_lock, flags);
|
|
|
|
do {
|
|
error = 0;
|
|
/*
|
|
* generate start condition
|
|
*/
|
|
i2c_start();
|
|
|
|
/*
|
|
* send slave address
|
|
*/
|
|
i2c_outbyte((theSlave & 0xfe));
|
|
/*
|
|
* wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error = 1;
|
|
/*
|
|
* now select register
|
|
*/
|
|
i2c_dir_out();
|
|
i2c_outbyte(theReg);
|
|
/*
|
|
* now it's time to wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error |= 2;
|
|
/*
|
|
* repeat start condition
|
|
*/
|
|
i2c_delay(CLOCK_LOW_TIME);
|
|
i2c_start();
|
|
/*
|
|
* send slave address
|
|
*/
|
|
i2c_outbyte(theSlave | 0x01);
|
|
/*
|
|
* wait for ack
|
|
*/
|
|
if(!i2c_getack())
|
|
error |= 4;
|
|
/*
|
|
* fetch register
|
|
*/
|
|
b = i2c_inbyte();
|
|
/*
|
|
* last received byte needs to be nacked
|
|
* instead of acked
|
|
*/
|
|
i2c_sendnack();
|
|
/*
|
|
* end sequence
|
|
*/
|
|
i2c_stop();
|
|
|
|
} while(error && cntr--);
|
|
|
|
spin_unlock_irqrestore(&i2c_lock, flags);
|
|
|
|
return b;
|
|
}
|
|
|
|
static int
|
|
i2c_open(struct inode *inode, struct file *filp)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
i2c_release(struct inode *inode, struct file *filp)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/* Main device API. ioctl's to write or read to/from i2c registers.
|
|
*/
|
|
|
|
static long
|
|
i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|
{
|
|
int ret;
|
|
if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
|
|
return -ENOTTY;
|
|
}
|
|
|
|
switch (_IOC_NR(cmd)) {
|
|
case I2C_WRITEREG:
|
|
/* write to an i2c slave */
|
|
D(printk("i2cw %d %d %d\n",
|
|
I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg),
|
|
I2C_ARGVALUE(arg)));
|
|
|
|
mutex_lock(&i2c_mutex);
|
|
ret = i2c_writereg(I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg),
|
|
I2C_ARGVALUE(arg));
|
|
mutex_unlock(&i2c_mutex);
|
|
return ret;
|
|
|
|
case I2C_READREG:
|
|
{
|
|
unsigned char val;
|
|
/* read from an i2c slave */
|
|
D(printk("i2cr %d %d ",
|
|
I2C_ARGSLAVE(arg),
|
|
I2C_ARGREG(arg)));
|
|
mutex_lock(&i2c_mutex);
|
|
val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
|
|
mutex_unlock(&i2c_mutex);
|
|
D(printk("= %d\n", val));
|
|
return val;
|
|
}
|
|
default:
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct file_operations i2c_fops = {
|
|
.owner = THIS_MODULE,
|
|
.unlocked_ioctl = i2c_ioctl,
|
|
.open = i2c_open,
|
|
.release = i2c_release,
|
|
};
|
|
|
|
static int __init i2c_init(void)
|
|
{
|
|
static int res;
|
|
static int first = 1;
|
|
|
|
if (!first)
|
|
return res;
|
|
|
|
first = 0;
|
|
|
|
/* Setup and enable the DATA and CLK pins */
|
|
|
|
res = crisv32_io_get_name(&cris_i2c_data,
|
|
CONFIG_ETRAX_V32_I2C_DATA_PORT);
|
|
if (res < 0)
|
|
return res;
|
|
|
|
res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
|
|
crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
|
|
|
|
return res;
|
|
}
|
|
|
|
|
|
static int __init i2c_register(void)
|
|
{
|
|
int res;
|
|
|
|
res = i2c_init();
|
|
if (res < 0)
|
|
return res;
|
|
|
|
/* register char device */
|
|
|
|
res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
|
|
if (res < 0) {
|
|
printk(KERN_ERR "i2c: couldn't get a major number.\n");
|
|
return res;
|
|
}
|
|
|
|
printk(KERN_INFO
|
|
"I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
|
|
|
|
return 0;
|
|
}
|
|
/* this makes sure that i2c_init is called during boot */
|
|
module_init(i2c_register);
|
|
|
|
/****************** END OF FILE i2c.c ********************************/
|