Gayatri Kammela 43ef6c226a platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake ... Just like Ice Lake, Tiger Lake uses Cannon Lake's LTR information and supports a few additional registers. Hence add the LTR registers specific to Tiger Lake to the cnp_ltr_show_map[]. Also adjust the number of LTR IPs for Tiger Lake to the correct amount. Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com> Link: https://lore.kernel.org/r/20210417031252.3020837-9-david.e.box@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>		2021-04-19 10:44:28 +02:00
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chrome	chrome platform changes for 5.12	2021-02-22 09:36:23 -08:00
goldfish	platform/goldfish: Convert pipe tasklet to threaded irq	2021-01-27 14:57:06 +01:00
mellanox	platform/mellanox: mlxreg-hotplug: move to use request_irq by IRQF_NO_AUTOEN flag	2021-04-08 16:20:09 +02:00
mips	MIPS: Loongson: Fix boot warning about hwmon_device_register()	2020-07-16 10:49:55 +02:00
olpc	Platform: OLPC: Constify static struct regulator_ops	2021-02-08 16:59:21 +01:00
surface	platform/surface: aggregator: move to use request_irq by IRQF_NO_AUTOEN flag	2021-04-08 16:20:09 +02:00
x86	platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake	2021-04-19 10:44:28 +02:00
Kconfig	platform: Add Surface platform directory	2020-10-27 12:51:03 +01:00
Makefile	platform: Add Surface platform directory	2020-10-27 12:51:03 +01:00