Add the sub-mailbox nodes that are used to communicate between MPU and the two R5F remote processors present in the MCU domain to the AM654 EVM base board. These sub-mailbox nodes utilize the System Mailbox clusters 0 and 1. The interrupts associated with the Mailbox Cluster User interrupt used by the sub-mailbox nodes are also added. The GIC_SPI interrupt to be used is dynamically allocated and managed by the System Firmware through the ti-sci-intr irqchip driver. All the remaining mailbox clusters are currently not used on A53 core, and so are disabled. The sub-mailbox nodes added match the hard-coded mailbox configuration used within the TI RTOS IPC software packages. The Cortex R5F processor sub-system is assumed to be running in Split mode, so a sub-mailbox node is used by each of the R5F cores. Only the sub-mailbox node from cluster 0 is used in case of Lockstep mode. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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boot | ||
configs | ||
crypto | ||
include | ||
kernel | ||
kvm | ||
lib | ||
mm | ||
net | ||
xen | ||
Kbuild | ||
Kconfig | ||
Kconfig.debug | ||
Kconfig.platforms | ||
Makefile |