Douglas Anderson 4351f19a33 clk: rockchip: Make calculations use rounding ... Let's use DIV_ROUND_CLOSEST for rounding, not just truncating division. This lets us get closer to the right rate. Before this: set_phase(86) delay_nums=26 reg[0xf000420c]=0x468 actual_degrees=83 set_phase(89) delay_nums=27 reg[0xf000420c]=0x46c actual_degrees=86 After this: set_phase(86) delay_nums=27 reg[0xf000420c]=0x46c actual_degrees=86 set_phase(89) delay_nums=28 reg[0xf000420c]=0x470 actual_degrees=90 Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2015-10-26 16:00:07 +01:00
..
clk-cpu.c	clk: rockchip: Properly include clk.h	2015-07-20 11:11:10 -07:00
clk-inverter.c	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	2015-08-24 16:49:12 -07:00
clk-mmc-phase.c	clk: rockchip: Make calculations use rounding	2015-10-26 16:00:07 +01:00
clk-pll.c	clk: rockchip: register pll mux before pll itself	2015-08-24 16:49:15 -07:00
clk-rk3188.c	clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188	2015-09-10 13:55:30 -07:00
clk-rk3288.c	This is the bulk of pin control changes for the v4.3 development	2015-09-04 10:22:09 -07:00
clk-rk3368.c	clk: rockchip: add critical clock for rk3368	2015-09-14 12:49:39 -07:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	clk: rockchip: add support for phase inverters	2015-07-06 15:04:40 -07:00
clk.h	clk: rockchip: Fix PLL bandwidth	2015-07-28 11:59:12 -07:00
Makefile	clk: rockchip: add rk3368 clock controller	2015-07-06 15:09:22 -07:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00