linux/drivers/infiniband/hw
Vipul Pandya 42b6a94990 RDMA/cxgb4: Use DSGLs for fastreg and adapter memory writes for T5.
It enables direct DMA by HW to memory region PBL arrays and fast register PBL
arrays from host memory, vs the T4 way of passing these arrays in the WR itself.
The result is lower latency for memory registration, and larger PBL array
support for fast register operations.

This patch also updates ULP_TX_MEM_WRITE command fields for T5. Ordering bit of
ULP_TX_MEM_WRITE is at bit position 22 in T5 and at 23 in T4.

Signed-off-by: Vipul Pandya <vipul@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-03-14 11:35:59 -04:00
..
amso1100 IB/amso1100: convert to idr_alloc() 2013-02-27 19:10:16 -08:00
cxgb3 IB/cxgb3: convert to idr_alloc() 2013-02-27 19:10:16 -08:00
cxgb4 RDMA/cxgb4: Use DSGLs for fastreg and adapter memory writes for T5. 2013-03-14 11:35:59 -04:00
ehca IB/ehca: convert to idr_alloc() 2013-02-27 19:10:16 -08:00
ipath fs: Limit sys_mount to only request filesystem modules. 2013-03-03 19:36:31 -08:00
mlx4 idr: remove MAX_IDR_MASK and move left MAX_IDR_* into idr.c 2013-02-27 19:10:20 -08:00
mthca Drivers: infinband: remove __dev* attributes. 2013-01-03 15:57:15 -08:00
nes Main batch of InfiniBand/RDMA changes for 3.9: 2013-02-26 11:41:08 -08:00
ocrdma IB/ocrdma: convert to idr_alloc() 2013-02-27 19:10:17 -08:00
qib fs: Limit sys_mount to only request filesystem modules. 2013-03-03 19:36:31 -08:00