forked from Minki/linux
7ed609b002
Switch sama5d3 boards to the new PMC clock bindings. This prevents the wb50n to use the out of spec rate for USART1. Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
32 lines
705 B
Plaintext
32 lines
705 B
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* sama5d3_tcb1.dtsi - Device Tree Include file for SAMA5D3 SoC with
|
|
* 2 TC blocks.
|
|
*
|
|
* Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
|
|
*/
|
|
|
|
#include <dt-bindings/pinctrl/at91.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
#include <dt-bindings/clock/at91.h>
|
|
|
|
/ {
|
|
aliases {
|
|
tcb1 = &tcb1;
|
|
};
|
|
|
|
ahb {
|
|
apb {
|
|
tcb1: timer@f8014000 {
|
|
compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0xf8014000 0x100>;
|
|
interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
|
|
clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&clk32k>;
|
|
clock-names = "t0_clk", "slow_clk";
|
|
};
|
|
};
|
|
};
|
|
};
|