forked from Minki/linux
2bfdd113d0
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd:
[ 4.854337] m25p80@0 enforce active low on chipselect handle
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
924 lines
20 KiB
Plaintext
924 lines
20 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device tree file for ZII's RPU2 board
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*
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* RPU - Remote Peripheral Unit
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*
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* Copyright (C) 2019 Zodiac Inflight Innovations
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*/
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/dts-v1/;
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#include <dt-bindings/thermal/thermal.h>
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#include "imx7d.dtsi"
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/ {
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model = "ZII RPU2 Board";
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compatible = "zii,imx7d-rpu2", "fsl,imx7d";
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chosen {
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stdout-path = &uart2;
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};
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cs2000_ref: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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cs2000_in_dummy: dummy-oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&pinctrl_leds_debug>;
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pinctrl-names = "default";
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debug {
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label = "zii:green:debug1";
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gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
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<&adc2 1>;
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};
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reg_can1_stby: regulator-can1-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1_stby>;
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regulator-name = "can1-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_can2_stby: regulator-can2-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2_stby>;
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regulator-name = "can2-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vref_1v8: regulator-vref-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vref-1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "GEN_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_5p0v_main: regulator-5p0v-main {
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compatible = "regulator-fixed";
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regulator-name = "5V_MAIN";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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sound1 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Audio Output 1";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound1_codec>;
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simple-audio-card,frame-master = <&sound1_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT",
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"LEFTIN", "HPL",
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"RIGHTIN", "HPR";
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simple-audio-card,aux-devs = <&hpa1>;
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simple-audio-card,cpu {
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sound-dai = <&sai1>;
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};
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sound1_codec: simple-audio-card,codec {
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sound-dai = <&codec1>;
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clocks = <&cs2000>;
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};
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};
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sound2 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Audio Output 2";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound2_codec>;
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simple-audio-card,frame-master = <&sound2_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT",
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"LEFTIN", "HPL",
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"RIGHTIN", "HPR";
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simple-audio-card,aux-devs = <&hpa2>;
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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};
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sound2_codec: simple-audio-card,codec {
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sound-dai = <&codec2>;
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clocks = <&cs2000>;
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};
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};
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sound3 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Audio Output 3";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sound3_codec>;
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simple-audio-card,frame-master = <&sound3_codec>;
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Headphone Jack", "HPLEFT",
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"Headphone Jack", "HPRIGHT",
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"LEFTIN", "HPL",
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"RIGHTIN", "HPR";
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simple-audio-card,aux-devs = <&hpa3>;
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simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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sound3_codec: simple-audio-card,codec {
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sound-dai = <&codec3>;
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clocks = <&cs2000>;
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};
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};
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};
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&adc1 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&adc2 {
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vref-supply = <®_vref_1v8>;
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&sw1a_reg>;
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};
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&clks {
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assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
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assigned-clock-rates = <884736000>;
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
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<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
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assigned-clock-rates = <0>, <100000000>;
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phy-mode = "rgmii";
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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mdio1: mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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switch: switch@0 {
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compatible = "marvell,mv88e6085";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_switch>;
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reg = <0>;
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eeprom-length = <512>;
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interrupt-parent = <&gpio1>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "eth_cu_1000_1";
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};
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port@1 {
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reg = <1>;
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label = "eth_cu_1000_2";
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};
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port@2 {
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reg = <2>;
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label = "pic";
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&fec1>;
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@6 {
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reg = <6>;
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label = "gigabit_proc";
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ethernet = <&fec2>;
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2>;
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assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
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<&clks IMX7D_ENET2_TIME_ROOT_CLK>;
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assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
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assigned-clock-rates = <0>, <100000000>;
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phy-mode = "rgmii";
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fsl,magic-packet;
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_can1_stby>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_can2_stby>;
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status = "okay";
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};
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&gpio1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio1>;
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gpio-line-names = "", "", "", "", "", "", "", "",
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"", "",
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"usb_1_en_b",
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"usb_2_en_b",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "";
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};
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&gpio2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio2>;
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gpio-line-names = "12v_out_en_1",
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"12v_out_en_2",
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"12v_out_en_3",
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"28v_out_en_5",
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"28v_out_en_1",
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"28v_out_en_2",
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"28v_out_en_3",
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"28v_out_en_4",
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"", "",
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"usb_3_en_b",
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"usb_4_en_b",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic: pmic@8 {
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compatible = "fsl,pfuze3000";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1a {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1b {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1475000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen2_reg: vldo2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-always-on;
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};
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vgen3_reg: vccsd {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen4_reg: v33 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vldo3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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cs2000: clkgen@4e {
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compatible = "cirrus,cs2000-cp";
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reg = <0x4e>;
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#clock-cells = <0>;
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clock-names = "clk_in", "ref_clk";
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clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
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assigned-clocks = <&cs2000>;
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assigned-clock-rates = <24000000>;
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};
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eeprom@50 {
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compatible = "atmel,24c04";
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reg = <0x50>;
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};
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eeprom@52 {
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compatible = "atmel,24c04";
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reg = <0x52>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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codec2: codec@18 {
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compatible = "ti,tlv320dac3100";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_codec2>;
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reg = <0x18>;
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#sound-dai-cells = <0>;
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HPVDD-supply = <®_3p3v>;
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SPRVDD-supply = <®_3p3v>;
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SPLVDD-supply = <®_3p3v>;
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AVDD-supply = <®_3p3v>;
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IOVDD-supply = <®_3p3v>;
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DVDD-supply = <&vgen4_reg>;
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gpio-reset = <&gpio1 6 GPIO_ACTIVE_LOW>;
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};
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hpa2: amp@60 {
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compatible = "ti,tpa6130a2";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpa2>;
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reg = <0x60>;
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power-gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
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Vdd-supply = <®_5p0v_main>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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codec3: codec@18 {
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compatible = "ti,tlv320dac3100";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_codec3>;
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reg = <0x18>;
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#sound-dai-cells = <0>;
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HPVDD-supply = <®_3p3v>;
|
|
SPRVDD-supply = <®_3p3v>;
|
|
SPLVDD-supply = <®_3p3v>;
|
|
AVDD-supply = <®_3p3v>;
|
|
IOVDD-supply = <®_3p3v>;
|
|
DVDD-supply = <&vgen4_reg>;
|
|
gpio-reset = <&gpio1 7 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
hpa3: amp@60 {
|
|
compatible = "ti,tpa6130a2";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_tpa3>;
|
|
reg = <0x60>;
|
|
power-gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
|
|
Vdd-supply = <®_5p0v_main>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c4>;
|
|
status = "okay";
|
|
|
|
codec1: codec@18 {
|
|
compatible = "ti,tlv320dac3100";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_codec1>;
|
|
reg = <0x18>;
|
|
#sound-dai-cells = <0>;
|
|
HPVDD-supply = <®_3p3v>;
|
|
SPRVDD-supply = <®_3p3v>;
|
|
SPLVDD-supply = <®_3p3v>;
|
|
AVDD-supply = <®_3p3v>;
|
|
IOVDD-supply = <®_3p3v>;
|
|
DVDD-supply = <&vgen4_reg>;
|
|
gpio-reset = <&gpio1 5 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
hpa1: amp@60 {
|
|
compatible = "ti,tpa6130a2";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_tpa1>;
|
|
reg = <0x60>;
|
|
power-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
|
Vdd-supply = <®_5p0v_main>;
|
|
};
|
|
};
|
|
|
|
&sai1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai1>;
|
|
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
|
|
<&clks IMX7D_SAI1_ROOT_CLK>;
|
|
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
|
|
assigned-clock-rates = <0>, <36864000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sai2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai2>;
|
|
assigned-clocks = <&clks IMX7D_SAI2_ROOT_SRC>,
|
|
<&clks IMX7D_SAI2_ROOT_CLK>;
|
|
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
|
|
assigned-clock-rates = <0>, <36864000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sai3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai3>;
|
|
assigned-clocks = <&clks IMX7D_SAI3_ROOT_SRC>,
|
|
<&clks IMX7D_SAI3_ROOT_CLK>;
|
|
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
|
|
assigned-clock-rates = <0>, <36864000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
|
|
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
|
|
status = "okay";
|
|
|
|
rave-sp {
|
|
compatible = "zii,rave-sp-rdu2";
|
|
current-speed = <1000000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
watchdog {
|
|
compatible = "zii,rave-sp-watchdog";
|
|
};
|
|
|
|
eeprom@a3 {
|
|
compatible = "zii,rave-sp-eeprom";
|
|
reg = <0xa3 0x4000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
zii,eeprom-name = "main-eeprom";
|
|
};
|
|
};
|
|
};
|
|
|
|
&usbotg1 {
|
|
dr_mode = "host";
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg2 {
|
|
dr_mode = "host";
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
bus-width = <4>;
|
|
no-1-8-v;
|
|
no-sdio;
|
|
keep-power-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
bus-width = <8>;
|
|
no-1-8-v;
|
|
non-removable;
|
|
no-sdio;
|
|
no-sd;
|
|
keep-power-in-suspend;
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog1 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&snvs_rtc {
|
|
status = "disabled";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2
|
|
MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2
|
|
MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2
|
|
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet1: enet1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
|
|
MX7D_PAD_SD2_WP__ENET1_MDC 0x3
|
|
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
|
|
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
|
|
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
|
|
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
|
|
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
|
|
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
|
|
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
|
|
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
|
|
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
|
|
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
|
|
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
|
|
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
|
|
>;
|
|
};
|
|
|
|
pinctrl_enet2: enet2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1
|
|
MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1
|
|
MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1
|
|
MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1
|
|
MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1
|
|
MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1
|
|
MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1
|
|
MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1
|
|
MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1
|
|
MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1
|
|
MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1
|
|
MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
|
|
MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x1
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan1: flexcan1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x59
|
|
MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan1_stby: flexcan1stbygrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan2: flexcan2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
|
|
MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_flexcan2_stby: flexcan2stbygrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio1: gpio1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x00
|
|
MX7D_PAD_GPIO1_IO11__GPIO1_IO11 0x00
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpio2: gpio2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x00
|
|
MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x00
|
|
MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x00
|
|
MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x03
|
|
MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x03
|
|
MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x03
|
|
MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x03
|
|
MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x03
|
|
MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x00
|
|
MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x00
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
|
|
MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
|
|
MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
|
|
MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x4000007f
|
|
MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4: i2c4grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f
|
|
MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4_gpio: i2c4gpiogrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x4000007f
|
|
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x4000007f
|
|
>;
|
|
};
|
|
|
|
pinctrl_leds_debug: debuggrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_sai1: sai1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f
|
|
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
|
|
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30
|
|
>;
|
|
};
|
|
|
|
pinctrl_sai2: sai2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SAI2_TX_BCLK__SAI2_TX_BCLK 0x1f
|
|
MX7D_PAD_SAI2_TX_SYNC__SAI2_TX_SYNC 0x1f
|
|
MX7D_PAD_SAI2_TX_DATA__SAI2_TX_DATA0 0x30
|
|
>;
|
|
};
|
|
|
|
pinctrl_sai3: sai3grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_UART3_TX_DATA__SAI3_TX_BCLK 0x1f
|
|
MX7D_PAD_UART3_CTS_B__SAI3_TX_SYNC 0x1f
|
|
MX7D_PAD_UART3_RTS_B__SAI3_TX_DATA0 0x30
|
|
>;
|
|
};
|
|
|
|
pinctrl_tpa1: tpa6130-1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_tpa2: tpa6130-2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_tpa3: tpa6130-3grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79
|
|
MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79
|
|
MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
|
|
MX7D_PAD_SD1_CLK__SD1_CLK 0x19
|
|
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
|
|
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
|
|
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
|
|
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
|
|
MX7D_PAD_SD3_CLK__SD3_CLK 0x19
|
|
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
|
|
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
|
|
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
|
|
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
|
|
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
|
|
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
|
|
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
|
|
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
|
|
MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59
|
|
>;
|
|
};
|
|
};
|
|
|
|
&iomuxc_lpsr {
|
|
pinctrl_codec1: dac1grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_codec2: dac2grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_codec3: dac3grp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x40000038
|
|
>;
|
|
};
|
|
|
|
pinctrl_switch: switchgrp {
|
|
fsl,pins = <
|
|
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08
|
|
>;
|
|
};
|
|
};
|