linux/include/soc/tegra
Dmitry Osipenko 41bafa698d soc/tegra: pmc: Add driver state syncing
Add driver state syncing that is invoked once all PMC consumers are
attached and ready. The consumers are the power domain clients.
The synchronization callback is invoked once all client drivers are
probed, the driver core handles this for us. This callback informs
PMC driver that all voltage votes are initialized by each PD client
and it's safe to begin voltage scaling of the core power domain.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash DT backwards-compatibility patch]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-06-02 10:58:55 +02:00
..
ahb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
bpmp-abi.h firmware: tegra: Update BPMP ABI 2020-07-14 18:03:45 +02:00
bpmp.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
common.h soc/tegra: Add devm_tegra_core_dev_init_opp_table() 2021-06-01 12:14:59 +02:00
cpuidle.h cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle 2020-03-13 11:31:58 +01:00
flowctrl.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 399 2019-06-05 17:37:12 +02:00
fuse.h soc/tegra: fuse: Add stubs needed for compile-testing 2021-06-01 12:15:13 +02:00
irq.h ARM: tegra: Expose PM functions required for new cpuidle driver 2020-03-13 11:22:41 +01:00
ivc.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
mc.h memory: tegra20: Add debug statistics 2021-04-01 19:58:22 +02:00
pm.h ARM: tegra: Rename some of the newly exposed PM functions 2020-03-13 11:23:08 +01:00
pmc.h soc/tegra: pmc: Add driver state syncing 2021-06-02 10:58:55 +02:00