forked from Minki/linux
5d5b43f59b
If the hardware supports extended tag field (8-bit ones), then enable it.
This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).
In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.
Fixes: fdo#86537
v2: Restrict changes to chipsets >= 0x84
v3:
* Add nvkm_pci_mask to pci.h
* Mask bit 8 before setting it
v4:
* Rename `add` argument of nvkm_pci_mask to `value`
* Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
checks
v5:
* Rebase code on latest PCI structure
* Restore PCIe check
* Fix namings in nvkm_pci_mask
* Rephrase part of the commit message
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
38 lines
1.1 KiB
C
38 lines
1.1 KiB
C
#ifndef __NVKM_PCI_H__
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#define __NVKM_PCI_H__
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#include <core/subdev.h>
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struct nvkm_pci {
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const struct nvkm_pci_func *func;
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struct nvkm_subdev subdev;
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struct pci_dev *pdev;
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int irq;
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struct {
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struct agp_bridge_data *bridge;
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u32 mode;
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u64 base;
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u64 size;
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int mtrr;
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bool cma;
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bool acquired;
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} agp;
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bool msi;
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};
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u32 nvkm_pci_rd32(struct nvkm_pci *, u16 addr);
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void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data);
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void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data);
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u32 nvkm_pci_mask(struct nvkm_pci *, u16 addr, u32 mask, u32 value);
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void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow);
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int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv46_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
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#endif
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