forked from Minki/linux
97b09da4ee
This tries to clear up the confusion between integers and iomem pointers in the marvell pxa platform. MMIO addresses are supposed to be __iomem* values, in order to let the Linux type checking work correctly. This patch moves the cast to __iomem as far back as possible, to the place where the MMIO virtual address windows are defined. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
|
|
* linux/arch/arm/mach-mmp/include/mach/addr-map.h
|
|
*
|
|
* Common address map definitions
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef __ASM_MACH_ADDR_MAP_H
|
|
#define __ASM_MACH_ADDR_MAP_H
|
|
|
|
#ifndef __ASSEMBLER__
|
|
#define IOMEM(x) ((void __iomem *)(x))
|
|
#else
|
|
#define IOMEM(x) (x)
|
|
#endif
|
|
|
|
/* APB - Application Subsystem Peripheral Bus
|
|
*
|
|
* NOTE: the DMA controller registers are actually on the AXI fabric #1
|
|
* slave port to AHB/APB bridge, due to its close relationship to those
|
|
* peripherals on APB, let's count it into the ABP mapping area.
|
|
*/
|
|
#define APB_PHYS_BASE 0xd4000000
|
|
#define APB_VIRT_BASE IOMEM(0xfe000000)
|
|
#define APB_PHYS_SIZE 0x00200000
|
|
|
|
#define AXI_PHYS_BASE 0xd4200000
|
|
#define AXI_VIRT_BASE IOMEM(0xfe200000)
|
|
#define AXI_PHYS_SIZE 0x00200000
|
|
|
|
/* Static Memory Controller - Chip Select 0 and 1 */
|
|
#define SMC_CS0_PHYS_BASE 0x80000000
|
|
#define SMC_CS0_PHYS_SIZE 0x10000000
|
|
#define SMC_CS1_PHYS_BASE 0x90000000
|
|
#define SMC_CS1_PHYS_SIZE 0x10000000
|
|
|
|
#endif /* __ASM_MACH_ADDR_MAP_H */
|