forked from Minki/linux
1d6da87a32
Pull drm updates from Dave Airlie: "Here's the main drm pull request for 4.7, it's been a busy one, and I've been a bit more distracted in real life this merge window. Lots more ARM drivers, not sure if it'll ever end. I think I've at least one more coming the next merge window. But changes are all over the place, support for AMD Polaris GPUs is in here, some missing GM108 support for nouveau (found in some Lenovos), a bunch of MST and skylake fixes. I've also noticed a few fixes from Arnd in my inbox, that I'll try and get in asap, but I didn't think they should hold this up. New drivers: - Hisilicon kirin display driver - Mediatek MT8173 display driver - ARC PGU - bitstreamer on Synopsys ARC SDP boards - Allwinner A13 initial RGB output driver - Analogix driver for DisplayPort IP found in exynos and rockchip DRM Core: - UAPI headers fixes and C++ safety - DRM connector reference counting - DisplayID mode parsing for Dell 5K monitors - Removal of struct_mutex from drivers - Connector registration cleanups - MST robustness fixes - MAINTAINERS updates - Lockless GEM object freeing - Generic fbdev deferred IO support panel: - Support for a bunch of new panels i915: - VBT refactoring - PLL computation cleanups - DSI support for BXT - Color manager support - More atomic patches - GEM improvements - GuC fw loading fixes - DP detection fixes - SKL GPU hang fixes - Lots of BXT fixes radeon/amdgpu: - Initial Polaris support - GPUVM/Scheduler/Clock/Power improvements - ASYNC pageflip support - New mesa feature support nouveau: - GM108 support - Power sensor support improvements - GR init + ucode fixes. - Use GPU provided topology information vmwgfx: - Add host messaging support gma500: - Some cleanups and fixes atmel: - Bridge support - Async atomic commit support fsl-dcu: - Timing controller for LCD support - Pixel clock polarity support rcar-du: - Misc fixes exynos: - Pipeline clock support - Exynoss4533 SoC support - HW trigger mode support - export HDMI_PHY clock - DECON5433 fixes - Use generic prime functions - use DMA mapping APIs rockchip: - Lots of little fixes vc4: - Render node support - Gamma ramp support - DPI output support msm: - Mostly cleanups and fixes - Conversion to generic struct fence etnaviv: - Fix for prime buffer handling - Allow hangcheck to be coalesced with other wakeups tegra: - Gamme table size fix" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits) drm/edid: add displayid detailed 1 timings to the modelist. (v1.1) drm/edid: move displayid validation to it's own function. drm/displayid: Iterate over all DisplayID blocks drm/edid: move displayid tiled block parsing into separate function. drm: Nuke ->vblank_disable_allowed drm/vmwgfx: Report vmwgfx version to vmware.log drm/vmwgfx: Add VMWare host messaging capability drm/vmwgfx: Kill some lockdep warnings drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode drm/nouveau/core: recognise GM108 chipsets drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup drm/nouveau/gr/gk104-: share implementation of ppc exception init drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx drm/nouveau/bios/pll: check BIT table version before trying to parse it drm/nouveau/bios/pll: prevent oops when limits table can't be parsed drm/nouveau/volt/gk104: round up in gk104_volt_set drm/nouveau/fb/gm200: setup mmu debug buffer registers at init() drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init() drm/nouveau/fb/gf100-: allocate mmu debug buffers drm/nouveau/fb: allow chipset-specific actions for oneinit() ...
461 lines
10 KiB
C
461 lines
10 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "msm_drv.h"
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#include "msm_gpu.h"
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#include "msm_gem.h"
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/*
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* Cmdstream submission:
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*/
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/* make sure these don't conflict w/ MSM_SUBMIT_BO_x */
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#define BO_VALID 0x8000 /* is current addr in cmdstream correct/valid? */
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#define BO_LOCKED 0x4000
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#define BO_PINNED 0x2000
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static struct msm_gem_submit *submit_create(struct drm_device *dev,
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struct msm_gpu *gpu, int nr)
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{
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struct msm_gem_submit *submit;
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int sz = sizeof(*submit) + (nr * sizeof(submit->bos[0]));
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submit = kmalloc(sz, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
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if (!submit)
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return NULL;
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submit->dev = dev;
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submit->gpu = gpu;
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submit->pid = get_pid(task_pid(current));
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/* initially, until copy_from_user() and bo lookup succeeds: */
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submit->nr_bos = 0;
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submit->nr_cmds = 0;
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INIT_LIST_HEAD(&submit->bo_list);
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ww_acquire_init(&submit->ticket, &reservation_ww_class);
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return submit;
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}
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void msm_gem_submit_free(struct msm_gem_submit *submit)
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{
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fence_put(submit->fence);
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list_del(&submit->node);
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put_pid(submit->pid);
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kfree(submit);
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}
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static int submit_lookup_objects(struct msm_gem_submit *submit,
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struct drm_msm_gem_submit *args, struct drm_file *file)
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{
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unsigned i;
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int ret = 0;
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spin_lock(&file->table_lock);
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for (i = 0; i < args->nr_bos; i++) {
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struct drm_msm_gem_submit_bo submit_bo;
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struct drm_gem_object *obj;
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struct msm_gem_object *msm_obj;
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void __user *userptr =
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u64_to_user_ptr(args->bos + (i * sizeof(submit_bo)));
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ret = copy_from_user(&submit_bo, userptr, sizeof(submit_bo));
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if (ret) {
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ret = -EFAULT;
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goto out_unlock;
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}
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if (submit_bo.flags & ~MSM_SUBMIT_BO_FLAGS) {
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DRM_ERROR("invalid flags: %x\n", submit_bo.flags);
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ret = -EINVAL;
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goto out_unlock;
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}
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submit->bos[i].flags = submit_bo.flags;
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/* in validate_objects() we figure out if this is true: */
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submit->bos[i].iova = submit_bo.presumed;
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/* normally use drm_gem_object_lookup(), but for bulk lookup
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* all under single table_lock just hit object_idr directly:
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*/
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obj = idr_find(&file->object_idr, submit_bo.handle);
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if (!obj) {
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DRM_ERROR("invalid handle %u at index %u\n", submit_bo.handle, i);
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ret = -EINVAL;
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goto out_unlock;
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}
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msm_obj = to_msm_bo(obj);
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if (!list_empty(&msm_obj->submit_entry)) {
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DRM_ERROR("handle %u at index %u already on submit list\n",
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submit_bo.handle, i);
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ret = -EINVAL;
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goto out_unlock;
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}
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drm_gem_object_reference(obj);
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submit->bos[i].obj = msm_obj;
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list_add_tail(&msm_obj->submit_entry, &submit->bo_list);
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}
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out_unlock:
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submit->nr_bos = i;
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spin_unlock(&file->table_lock);
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return ret;
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}
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static void submit_unlock_unpin_bo(struct msm_gem_submit *submit, int i)
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{
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struct msm_gem_object *msm_obj = submit->bos[i].obj;
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if (submit->bos[i].flags & BO_PINNED)
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msm_gem_put_iova(&msm_obj->base, submit->gpu->id);
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if (submit->bos[i].flags & BO_LOCKED)
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ww_mutex_unlock(&msm_obj->resv->lock);
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if (!(submit->bos[i].flags & BO_VALID))
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submit->bos[i].iova = 0;
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submit->bos[i].flags &= ~(BO_LOCKED | BO_PINNED);
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}
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/* This is where we make sure all the bo's are reserved and pin'd: */
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static int submit_lock_objects(struct msm_gem_submit *submit)
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{
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int contended, slow_locked = -1, i, ret = 0;
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retry:
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for (i = 0; i < submit->nr_bos; i++) {
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struct msm_gem_object *msm_obj = submit->bos[i].obj;
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if (slow_locked == i)
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slow_locked = -1;
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contended = i;
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if (!(submit->bos[i].flags & BO_LOCKED)) {
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ret = ww_mutex_lock_interruptible(&msm_obj->resv->lock,
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&submit->ticket);
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if (ret)
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goto fail;
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submit->bos[i].flags |= BO_LOCKED;
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}
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}
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ww_acquire_done(&submit->ticket);
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return 0;
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fail:
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for (; i >= 0; i--)
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submit_unlock_unpin_bo(submit, i);
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if (slow_locked > 0)
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submit_unlock_unpin_bo(submit, slow_locked);
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if (ret == -EDEADLK) {
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struct msm_gem_object *msm_obj = submit->bos[contended].obj;
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/* we lost out in a seqno race, lock and retry.. */
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ret = ww_mutex_lock_slow_interruptible(&msm_obj->resv->lock,
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&submit->ticket);
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if (!ret) {
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submit->bos[contended].flags |= BO_LOCKED;
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slow_locked = contended;
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goto retry;
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}
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}
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return ret;
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}
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static int submit_fence_sync(struct msm_gem_submit *submit)
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{
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int i, ret = 0;
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for (i = 0; i < submit->nr_bos; i++) {
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struct msm_gem_object *msm_obj = submit->bos[i].obj;
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bool write = submit->bos[i].flags & MSM_SUBMIT_BO_WRITE;
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ret = msm_gem_sync_object(&msm_obj->base, submit->gpu->fctx, write);
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if (ret)
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break;
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}
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return ret;
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}
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static int submit_pin_objects(struct msm_gem_submit *submit)
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{
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int i, ret = 0;
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submit->valid = true;
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for (i = 0; i < submit->nr_bos; i++) {
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struct msm_gem_object *msm_obj = submit->bos[i].obj;
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uint32_t iova;
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/* if locking succeeded, pin bo: */
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ret = msm_gem_get_iova_locked(&msm_obj->base,
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submit->gpu->id, &iova);
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if (ret)
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break;
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submit->bos[i].flags |= BO_PINNED;
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if (iova == submit->bos[i].iova) {
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submit->bos[i].flags |= BO_VALID;
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} else {
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submit->bos[i].iova = iova;
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/* iova changed, so address in cmdstream is not valid: */
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submit->bos[i].flags &= ~BO_VALID;
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submit->valid = false;
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}
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}
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return ret;
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}
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static int submit_bo(struct msm_gem_submit *submit, uint32_t idx,
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struct msm_gem_object **obj, uint32_t *iova, bool *valid)
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{
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if (idx >= submit->nr_bos) {
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DRM_ERROR("invalid buffer index: %u (out of %u)\n",
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idx, submit->nr_bos);
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return -EINVAL;
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}
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if (obj)
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*obj = submit->bos[idx].obj;
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if (iova)
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*iova = submit->bos[idx].iova;
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if (valid)
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*valid = !!(submit->bos[idx].flags & BO_VALID);
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return 0;
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}
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/* process the reloc's and patch up the cmdstream as needed: */
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static int submit_reloc(struct msm_gem_submit *submit, struct msm_gem_object *obj,
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uint32_t offset, uint32_t nr_relocs, uint64_t relocs)
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{
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uint32_t i, last_offset = 0;
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uint32_t *ptr;
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int ret;
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if (offset % 4) {
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DRM_ERROR("non-aligned cmdstream buffer: %u\n", offset);
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return -EINVAL;
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}
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/* For now, just map the entire thing. Eventually we probably
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* to do it page-by-page, w/ kmap() if not vmap()d..
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*/
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ptr = msm_gem_vaddr_locked(&obj->base);
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if (IS_ERR(ptr)) {
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ret = PTR_ERR(ptr);
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DBG("failed to map: %d", ret);
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return ret;
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}
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for (i = 0; i < nr_relocs; i++) {
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struct drm_msm_gem_submit_reloc submit_reloc;
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void __user *userptr =
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u64_to_user_ptr(relocs + (i * sizeof(submit_reloc)));
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uint32_t iova, off;
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bool valid;
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ret = copy_from_user(&submit_reloc, userptr, sizeof(submit_reloc));
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if (ret)
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return -EFAULT;
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if (submit_reloc.submit_offset % 4) {
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DRM_ERROR("non-aligned reloc offset: %u\n",
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submit_reloc.submit_offset);
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return -EINVAL;
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}
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/* offset in dwords: */
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off = submit_reloc.submit_offset / 4;
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if ((off >= (obj->base.size / 4)) ||
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(off < last_offset)) {
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DRM_ERROR("invalid offset %u at reloc %u\n", off, i);
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return -EINVAL;
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}
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ret = submit_bo(submit, submit_reloc.reloc_idx, NULL, &iova, &valid);
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if (ret)
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return ret;
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if (valid)
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continue;
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iova += submit_reloc.reloc_offset;
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if (submit_reloc.shift < 0)
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iova >>= -submit_reloc.shift;
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else
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iova <<= submit_reloc.shift;
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ptr[off] = iova | submit_reloc.or;
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last_offset = off;
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}
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return 0;
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}
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static void submit_cleanup(struct msm_gem_submit *submit)
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{
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unsigned i;
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for (i = 0; i < submit->nr_bos; i++) {
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struct msm_gem_object *msm_obj = submit->bos[i].obj;
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submit_unlock_unpin_bo(submit, i);
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list_del_init(&msm_obj->submit_entry);
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drm_gem_object_unreference(&msm_obj->base);
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}
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ww_acquire_fini(&submit->ticket);
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}
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int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct msm_drm_private *priv = dev->dev_private;
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struct drm_msm_gem_submit *args = data;
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struct msm_file_private *ctx = file->driver_priv;
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struct msm_gem_submit *submit;
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struct msm_gpu *gpu = priv->gpu;
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unsigned i;
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int ret;
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if (!gpu)
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return -ENXIO;
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/* for now, we just have 3d pipe.. eventually this would need to
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* be more clever to dispatch to appropriate gpu module:
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*/
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if (args->pipe != MSM_PIPE_3D0)
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return -EINVAL;
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if (args->nr_cmds > MAX_CMDS)
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return -EINVAL;
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submit = submit_create(dev, gpu, args->nr_bos);
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if (!submit)
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return -ENOMEM;
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mutex_lock(&dev->struct_mutex);
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ret = submit_lookup_objects(submit, args, file);
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if (ret)
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goto out;
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ret = submit_lock_objects(submit);
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if (ret)
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goto out;
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ret = submit_fence_sync(submit);
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if (ret)
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goto out;
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ret = submit_pin_objects(submit);
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if (ret)
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goto out;
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for (i = 0; i < args->nr_cmds; i++) {
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struct drm_msm_gem_submit_cmd submit_cmd;
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void __user *userptr =
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u64_to_user_ptr(args->cmds + (i * sizeof(submit_cmd)));
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struct msm_gem_object *msm_obj;
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uint32_t iova;
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ret = copy_from_user(&submit_cmd, userptr, sizeof(submit_cmd));
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if (ret) {
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ret = -EFAULT;
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goto out;
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}
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/* validate input from userspace: */
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switch (submit_cmd.type) {
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case MSM_SUBMIT_CMD_BUF:
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case MSM_SUBMIT_CMD_IB_TARGET_BUF:
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case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
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break;
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default:
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DRM_ERROR("invalid type: %08x\n", submit_cmd.type);
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ret = -EINVAL;
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goto out;
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}
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ret = submit_bo(submit, submit_cmd.submit_idx,
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&msm_obj, &iova, NULL);
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if (ret)
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goto out;
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if (submit_cmd.size % 4) {
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DRM_ERROR("non-aligned cmdstream buffer size: %u\n",
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submit_cmd.size);
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ret = -EINVAL;
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goto out;
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}
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if ((submit_cmd.size + submit_cmd.submit_offset) >=
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msm_obj->base.size) {
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DRM_ERROR("invalid cmdstream size: %u\n", submit_cmd.size);
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ret = -EINVAL;
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goto out;
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}
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submit->cmd[i].type = submit_cmd.type;
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submit->cmd[i].size = submit_cmd.size / 4;
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submit->cmd[i].iova = iova + submit_cmd.submit_offset;
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submit->cmd[i].idx = submit_cmd.submit_idx;
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if (submit->valid)
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continue;
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ret = submit_reloc(submit, msm_obj, submit_cmd.submit_offset,
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submit_cmd.nr_relocs, submit_cmd.relocs);
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if (ret)
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goto out;
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}
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submit->nr_cmds = i;
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ret = msm_gpu_submit(gpu, submit, ctx);
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args->fence = submit->fence->seqno;
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out:
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submit_cleanup(submit);
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if (ret)
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msm_gem_submit_free(submit);
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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