forked from Minki/linux
b276268631
Impact: cleanup; preparation for feature The mce_amd_64 code has an own private MC threshold vector with an own interrupt handler. Since Intel needs a similar handler it makes sense to share the vector because both can not be active at the same time. I factored the common APIC handler code into a separate file which can be used by both the Intel or AMD MC code. This is needed for the next patch which adds an Intel specific CMCI handler. This patch should be a nop for AMD, it just moves some code around. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
8 lines
277 B
Makefile
8 lines
277 B
Makefile
obj-y = mce_$(BITS).o therm_throt.o
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obj-$(CONFIG_X86_32) += k7.o p4.o p5.o p6.o winchip.o
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obj-$(CONFIG_X86_MCE_INTEL) += mce_intel_64.o
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obj-$(CONFIG_X86_MCE_AMD) += mce_amd_64.o
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obj-$(CONFIG_X86_MCE_NONFATAL) += non-fatal.o
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obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
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