Duc Dang 8000bc3fe9 arm64: dts: Add L2 cache topology for APM X-Gene SoC ... In APM X-Gene SoC (both v1 and v2), each pair of processors shares the same L2 cache. This patch adds l2-cache entries into X-Gene SoC device tree to demonstrate this configuration. Signed-off-by: Duc Dang <dhdang@apm.com>		2015-11-17 13:11:56 -08:00
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apm-merlin.dts	arm64: dts: Add RTC DTS entry for X-Gene v2 SoC platform	2015-11-17 13:11:56 -08:00
apm-mustang.dts	arm64: dts: Add the arasan mmc DTS entries for APM X-Gene v1 SoC	2015-11-17 13:11:53 -08:00
apm-shadowcat.dtsi	arm64: dts: Add L2 cache topology for APM X-Gene SoC	2015-11-17 13:11:56 -08:00
apm-storm.dtsi	arm64: dts: Add L2 cache topology for APM X-Gene SoC	2015-11-17 13:11:56 -08:00
Makefile	arm64: dts: add APM Merlin Board device tree	2015-09-16 12:04:24 -07:00