forked from Minki/linux
674f368a95
The CRYPTO_TFM_RES_BAD_KEY_LEN flag was apparently meant as a way to make the ->setkey() functions provide more information about errors. However, no one actually checks for this flag, which makes it pointless. Also, many algorithms fail to set this flag when given a bad length key. Reviewing just the generic implementations, this is the case for aes-fixed-time, cbcmac, echainiv, nhpoly1305, pcrypt, rfc3686, rfc4309, rfc7539, rfc7539esp, salsa20, seqiv, and xcbc. But there are probably many more in arch/*/crypto/ and drivers/crypto/. Some algorithms can even set this flag when the key is the correct length. For example, authenc and authencesn set it when the key payload is malformed in any way (not just a bad length), the atmel-sha and ccree drivers can set it if a memory allocation fails, and the chelsio driver sets it for bad auth tag lengths, not just bad key lengths. So even if someone actually wanted to start checking this flag (which seems unlikely, since it's been unused for a long time), there would be a lot of work needed to get it working correctly. But it would probably be much better to go back to the drawing board and just define different return values, like -EINVAL if the key is invalid for the algorithm vs. -EKEYREJECTED if the key was rejected by a policy like "no weak keys". That would be much simpler, less error-prone, and easier to test. So just remove this flag. Signed-off-by: Eric Biggers <ebiggers@google.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
487 lines
12 KiB
C
487 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 Cavium, Inc.
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*/
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#include <crypto/authenc.h>
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#include <crypto/internal/des.h>
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#include <crypto/xts.h>
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#include <linux/crypto.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <linux/scatterlist.h>
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#include "cptvf.h"
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#include "cptvf_algs.h"
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struct cpt_device_handle {
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void *cdev[MAX_DEVICES];
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u32 dev_count;
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};
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static struct cpt_device_handle dev_handle;
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static void cvm_callback(u32 status, void *arg)
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{
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struct crypto_async_request *req = (struct crypto_async_request *)arg;
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req->complete(req, !status);
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}
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static inline void update_input_iv(struct cpt_request_info *req_info,
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u8 *iv, u32 enc_iv_len,
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u32 *argcnt)
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{
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/* Setting the iv information */
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req_info->in[*argcnt].vptr = (void *)iv;
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req_info->in[*argcnt].size = enc_iv_len;
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req_info->req.dlen += enc_iv_len;
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++(*argcnt);
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}
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static inline void update_output_iv(struct cpt_request_info *req_info,
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u8 *iv, u32 enc_iv_len,
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u32 *argcnt)
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{
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/* Setting the iv information */
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req_info->out[*argcnt].vptr = (void *)iv;
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req_info->out[*argcnt].size = enc_iv_len;
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req_info->rlen += enc_iv_len;
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++(*argcnt);
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}
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static inline void update_input_data(struct cpt_request_info *req_info,
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struct scatterlist *inp_sg,
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u32 nbytes, u32 *argcnt)
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{
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req_info->req.dlen += nbytes;
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while (nbytes) {
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u32 len = min(nbytes, inp_sg->length);
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u8 *ptr = sg_virt(inp_sg);
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req_info->in[*argcnt].vptr = (void *)ptr;
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req_info->in[*argcnt].size = len;
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nbytes -= len;
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++(*argcnt);
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++inp_sg;
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}
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}
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static inline void update_output_data(struct cpt_request_info *req_info,
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struct scatterlist *outp_sg,
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u32 nbytes, u32 *argcnt)
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{
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req_info->rlen += nbytes;
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while (nbytes) {
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u32 len = min(nbytes, outp_sg->length);
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u8 *ptr = sg_virt(outp_sg);
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req_info->out[*argcnt].vptr = (void *)ptr;
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req_info->out[*argcnt].size = len;
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nbytes -= len;
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++(*argcnt);
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++outp_sg;
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}
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}
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static inline u32 create_ctx_hdr(struct skcipher_request *req, u32 enc,
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u32 *argcnt)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct cvm_enc_ctx *ctx = crypto_skcipher_ctx(tfm);
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struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
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struct fc_context *fctx = &rctx->fctx;
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u64 *offset_control = &rctx->control_word;
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u32 enc_iv_len = crypto_skcipher_ivsize(tfm);
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struct cpt_request_info *req_info = &rctx->cpt_req;
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u64 *ctrl_flags = NULL;
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req_info->ctrl.s.grp = 0;
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req_info->ctrl.s.dma_mode = DMA_GATHER_SCATTER;
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req_info->ctrl.s.se_req = SE_CORE_REQ;
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req_info->req.opcode.s.major = MAJOR_OP_FC |
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DMA_MODE_FLAG(DMA_GATHER_SCATTER);
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if (enc)
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req_info->req.opcode.s.minor = 2;
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else
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req_info->req.opcode.s.minor = 3;
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req_info->req.param1 = req->cryptlen; /* Encryption Data length */
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req_info->req.param2 = 0; /*Auth data length */
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fctx->enc.enc_ctrl.e.enc_cipher = ctx->cipher_type;
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fctx->enc.enc_ctrl.e.aes_key = ctx->key_type;
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fctx->enc.enc_ctrl.e.iv_source = FROM_DPTR;
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if (ctx->cipher_type == AES_XTS)
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memcpy(fctx->enc.encr_key, ctx->enc_key, ctx->key_len * 2);
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else
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memcpy(fctx->enc.encr_key, ctx->enc_key, ctx->key_len);
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ctrl_flags = (u64 *)&fctx->enc.enc_ctrl.flags;
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*ctrl_flags = cpu_to_be64(*ctrl_flags);
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*offset_control = cpu_to_be64(((u64)(enc_iv_len) << 16));
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/* Storing Packet Data Information in offset
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* Control Word First 8 bytes
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*/
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req_info->in[*argcnt].vptr = (u8 *)offset_control;
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req_info->in[*argcnt].size = CONTROL_WORD_LEN;
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req_info->req.dlen += CONTROL_WORD_LEN;
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++(*argcnt);
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req_info->in[*argcnt].vptr = (u8 *)fctx;
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req_info->in[*argcnt].size = sizeof(struct fc_context);
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req_info->req.dlen += sizeof(struct fc_context);
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++(*argcnt);
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return 0;
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}
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static inline u32 create_input_list(struct skcipher_request *req, u32 enc,
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u32 enc_iv_len)
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{
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struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
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struct cpt_request_info *req_info = &rctx->cpt_req;
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u32 argcnt = 0;
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create_ctx_hdr(req, enc, &argcnt);
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update_input_iv(req_info, req->iv, enc_iv_len, &argcnt);
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update_input_data(req_info, req->src, req->cryptlen, &argcnt);
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req_info->incnt = argcnt;
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return 0;
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}
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static inline void store_cb_info(struct skcipher_request *req,
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struct cpt_request_info *req_info)
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{
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req_info->callback = (void *)cvm_callback;
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req_info->callback_arg = (void *)&req->base;
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}
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static inline void create_output_list(struct skcipher_request *req,
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u32 enc_iv_len)
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{
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struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
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struct cpt_request_info *req_info = &rctx->cpt_req;
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u32 argcnt = 0;
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/* OUTPUT Buffer Processing
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* AES encryption/decryption output would be
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* received in the following format
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*
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* ------IV--------|------ENCRYPTED/DECRYPTED DATA-----|
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* [ 16 Bytes/ [ Request Enc/Dec/ DATA Len AES CBC ]
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*/
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/* Reading IV information */
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update_output_iv(req_info, req->iv, enc_iv_len, &argcnt);
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update_output_data(req_info, req->dst, req->cryptlen, &argcnt);
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req_info->outcnt = argcnt;
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}
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static inline int cvm_enc_dec(struct skcipher_request *req, u32 enc)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
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u32 enc_iv_len = crypto_skcipher_ivsize(tfm);
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struct fc_context *fctx = &rctx->fctx;
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struct cpt_request_info *req_info = &rctx->cpt_req;
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void *cdev = NULL;
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int status;
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memset(req_info, 0, sizeof(struct cpt_request_info));
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memset(fctx, 0, sizeof(struct fc_context));
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create_input_list(req, enc, enc_iv_len);
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create_output_list(req, enc_iv_len);
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store_cb_info(req, req_info);
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cdev = dev_handle.cdev[smp_processor_id()];
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status = cptvf_do_request(cdev, req_info);
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/* We perform an asynchronous send and once
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* the request is completed the driver would
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* intimate through registered call back functions
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*/
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if (status)
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return status;
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else
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return -EINPROGRESS;
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}
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static int cvm_encrypt(struct skcipher_request *req)
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{
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return cvm_enc_dec(req, true);
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}
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static int cvm_decrypt(struct skcipher_request *req)
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{
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return cvm_enc_dec(req, false);
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}
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static int cvm_xts_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher);
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struct cvm_enc_ctx *ctx = crypto_tfm_ctx(tfm);
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int err;
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const u8 *key1 = key;
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const u8 *key2 = key + (keylen / 2);
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err = xts_check_key(tfm, key, keylen);
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if (err)
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return err;
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ctx->key_len = keylen;
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memcpy(ctx->enc_key, key1, keylen / 2);
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memcpy(ctx->enc_key + KEY2_OFFSET, key2, keylen / 2);
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ctx->cipher_type = AES_XTS;
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switch (ctx->key_len) {
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case 32:
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ctx->key_type = AES_128_BIT;
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break;
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case 64:
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ctx->key_type = AES_256_BIT;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int cvm_validate_keylen(struct cvm_enc_ctx *ctx, u32 keylen)
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{
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if ((keylen == 16) || (keylen == 24) || (keylen == 32)) {
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ctx->key_len = keylen;
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switch (ctx->key_len) {
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case 16:
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ctx->key_type = AES_128_BIT;
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break;
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case 24:
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ctx->key_type = AES_192_BIT;
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break;
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case 32:
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ctx->key_type = AES_256_BIT;
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break;
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default:
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return -EINVAL;
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}
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if (ctx->cipher_type == DES3_CBC)
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ctx->key_type = 0;
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return 0;
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}
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return -EINVAL;
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}
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static int cvm_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen, u8 cipher_type)
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{
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struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher);
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struct cvm_enc_ctx *ctx = crypto_tfm_ctx(tfm);
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ctx->cipher_type = cipher_type;
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if (!cvm_validate_keylen(ctx, keylen)) {
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memcpy(ctx->enc_key, key, keylen);
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return 0;
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} else {
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return -EINVAL;
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}
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}
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static int cvm_cbc_aes_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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return cvm_setkey(cipher, key, keylen, AES_CBC);
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}
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static int cvm_ecb_aes_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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return cvm_setkey(cipher, key, keylen, AES_ECB);
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}
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static int cvm_cfb_aes_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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return cvm_setkey(cipher, key, keylen, AES_CFB);
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}
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static int cvm_cbc_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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return verify_skcipher_des3_key(cipher, key) ?:
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cvm_setkey(cipher, key, keylen, DES3_CBC);
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}
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static int cvm_ecb_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
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u32 keylen)
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{
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return verify_skcipher_des3_key(cipher, key) ?:
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cvm_setkey(cipher, key, keylen, DES3_ECB);
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}
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static int cvm_enc_dec_init(struct crypto_skcipher *tfm)
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{
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crypto_skcipher_set_reqsize(tfm, sizeof(struct cvm_req_ctx));
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return 0;
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}
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static struct skcipher_alg algs[] = { {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_enc_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "xts(aes)",
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.base.cra_driver_name = "cavium-xts-aes",
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.base.cra_module = THIS_MODULE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = 2 * AES_MIN_KEY_SIZE,
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.max_keysize = 2 * AES_MAX_KEY_SIZE,
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.setkey = cvm_xts_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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}, {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_enc_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "cbc(aes)",
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.base.cra_driver_name = "cavium-cbc-aes",
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.base.cra_module = THIS_MODULE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = cvm_cbc_aes_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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}, {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_enc_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "ecb(aes)",
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.base.cra_driver_name = "cavium-ecb-aes",
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.base.cra_module = THIS_MODULE,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = cvm_ecb_aes_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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}, {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = AES_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_enc_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "cfb(aes)",
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.base.cra_driver_name = "cavium-cfb-aes",
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.base.cra_module = THIS_MODULE,
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.ivsize = AES_BLOCK_SIZE,
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = cvm_cfb_aes_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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}, {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_des3_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "cbc(des3_ede)",
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.base.cra_driver_name = "cavium-cbc-des3_ede",
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.base.cra_module = THIS_MODULE,
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.min_keysize = DES3_EDE_KEY_SIZE,
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.max_keysize = DES3_EDE_KEY_SIZE,
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.ivsize = DES_BLOCK_SIZE,
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.setkey = cvm_cbc_des3_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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}, {
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.base.cra_flags = CRYPTO_ALG_ASYNC,
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.base.cra_blocksize = DES3_EDE_BLOCK_SIZE,
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.base.cra_ctxsize = sizeof(struct cvm_des3_ctx),
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.base.cra_alignmask = 7,
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.base.cra_priority = 4001,
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.base.cra_name = "ecb(des3_ede)",
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.base.cra_driver_name = "cavium-ecb-des3_ede",
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.base.cra_module = THIS_MODULE,
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.min_keysize = DES3_EDE_KEY_SIZE,
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.max_keysize = DES3_EDE_KEY_SIZE,
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.ivsize = DES_BLOCK_SIZE,
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.setkey = cvm_ecb_des3_setkey,
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.encrypt = cvm_encrypt,
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.decrypt = cvm_decrypt,
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.init = cvm_enc_dec_init,
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} };
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static inline int cav_register_algs(void)
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{
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int err = 0;
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err = crypto_register_skciphers(algs, ARRAY_SIZE(algs));
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if (err)
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return err;
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|
|
return 0;
|
|
}
|
|
|
|
static inline void cav_unregister_algs(void)
|
|
{
|
|
crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
|
|
}
|
|
|
|
int cvm_crypto_init(struct cpt_vf *cptvf)
|
|
{
|
|
struct pci_dev *pdev = cptvf->pdev;
|
|
u32 dev_count;
|
|
|
|
dev_count = dev_handle.dev_count;
|
|
dev_handle.cdev[dev_count] = cptvf;
|
|
dev_handle.dev_count++;
|
|
|
|
if (dev_count == 3) {
|
|
if (cav_register_algs()) {
|
|
dev_err(&pdev->dev, "Error in registering crypto algorithms\n");
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void cvm_crypto_exit(void)
|
|
{
|
|
u32 dev_count;
|
|
|
|
dev_count = --dev_handle.dev_count;
|
|
if (!dev_count)
|
|
cav_unregister_algs();
|
|
}
|