linux/drivers/clk/meson
Martin Blumenstingl 3cf94c94e8 clk: meson: clk-regmap: add read-only gate ops
Some of the gate clocks are described as "just in case" bits in the
datasheet. Examples are the ABP, PERIPH, AXI and L2 DRAM clocks on
Meson8b.
The datasheet suggests that these bits are not touched. The full
explanation is:
"Set to 1 to manually disable the [...] clock when changing the mux
selection. Typically this bit is set to 0 since the clock muxes can
switch without glitches.".

This adds new read-only ops for gate clocks so we can describe these
clocks in our clock controller drivers while ensuring that we can't
accidentally modify the registers.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20181122214017.25643-3-martin.blumenstingl@googlemail.com
2018-11-23 15:11:58 +01:00
..
axg-aoclk.c clk: meson-axg: Add AO Clock and Reset controller driver 2018-05-15 14:19:43 +02:00
axg-aoclk.h clk: meson-axg: Add AO Clock and Reset controller driver 2018-05-15 14:19:43 +02:00
axg-audio.c clk: meson: axg: round audio system master clocks down 2018-09-26 12:02:00 +02:00
axg-audio.h clk: meson: axg: add the audio clock controller driver 2018-07-09 13:48:26 +02:00
axg.c clk: meson-axg: pcie: drop the mpll3 clock parent 2018-09-26 12:02:00 +02:00
axg.h clk: meson: clk-pll: remove od parameters 2018-09-26 12:01:57 +02:00
clk-mpll.c clk: meson: mpll: add round closest support 2018-05-21 11:31:29 +02:00
clk-phase.c clk: meson: add clk-phase clock driver 2018-07-09 13:47:22 +02:00
clk-pll.c clk: meson: clk-pll: check if the clock is already enabled 2018-11-23 15:11:57 +01:00
clk-regmap.c clk: meson: clk-regmap: add read-only gate ops 2018-11-23 15:11:58 +01:00
clk-regmap.h clk: meson: clk-regmap: add read-only gate ops 2018-11-23 15:11:58 +01:00
clk-triphase.c clk: meson: add triple phase clock driver 2018-07-09 13:47:22 +02:00
clkc-audio.h clk: meson: add axg audio sclk divider driver 2018-07-09 13:48:25 +02:00
clkc.h clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00
gxbb-aoclk-32k.c clk: meson: use SPDX license identifiers consistently 2018-05-18 12:08:29 +02:00
gxbb-aoclk.c clk: meson: use SPDX license identifiers consistently 2018-05-18 12:08:29 +02:00
gxbb-aoclk.h This time we have a good set of changes to the core framework that do some 2018-06-09 12:06:24 -07:00
gxbb.c clk: meson-gxbb: Add video clocks 2018-11-23 15:11:56 +01:00
gxbb.h dt-bindings: clk: meson-gxbb: Add Video clock bindings 2018-11-23 15:11:56 +01:00
Kconfig clk: meson: axg: add the audio clock controller driver 2018-07-09 13:48:26 +02:00
Makefile clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00
meson8b.c clk: meson: meson8b: allow changing the CPU clock tree 2018-11-23 15:11:58 +01:00
meson8b.h clk: meson: clk-pll: remove od parameters 2018-09-26 12:01:57 +02:00
meson-aoclk.c clk: meson: aoclk: refactor common code into dedicated file 2018-05-15 14:19:42 +02:00
meson-aoclk.h clk: meson: aoclk: refactor common code into dedicated file 2018-05-15 14:19:42 +02:00
sclk-div.c clk: meson: add axg audio sclk divider driver 2018-07-09 13:48:25 +02:00
vid-pll-div.c clk: meson: Add vid_pll divider driver 2018-11-23 15:11:56 +01:00