Aditya Swarup 3b91a93597 drm/i915/cnl: Fix CNL macros for Voltage Swing programming ... CNL macros for register groups CNL_PORT_TX_DW2_* / CNL_PORT_TX_DW5_* are configured incorrectly wrt definition of _CNL_PORT_TX_DW_GRP. v2: Jani suggested to keep the macros organized semantically i.e., by function, secondarily by port/pipe/transcoder.->(dw, port) Fixes: 4e53840fdf ("drm/i915/icl: Introduce new macros to get combophy registers") Cc: Clint Taylor <clinton.a.taylor@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190110230844.9213-1-aditya.swarup@intel.com (cherry picked from commit b14c06ec02) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2019-02-11 18:35:43 +02:00
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drm	drm/i915/cnl: Fix CNL macros for Voltage Swing programming	2019-02-11 18:35:43 +02:00
host1x	gpu: host1x: Add Tegra194 support	2018-11-29 17:11:49 +01:00
ipu-v3	gpu: ipu-v3: image-convert: allow three rows or columns	2018-11-05 14:40:08 +01:00
vga	vga-switcheroo: make PCI dependency explicit	2019-01-15 23:16:47 +01:00
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