Eric Yang 622a88c825 drm/amd/display: move wm ranges reporting to end of init hw ... [Why] SMU does not keep the wm table across S3, S4, need to re-send the table. Also defer sending the cable to after DCN bave initialized [How] Send table at end of init hw Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-10-25 16:50:09 -04:00
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hw	drm/amd/display: move wm ranges reporting to end of init hw	2019-10-25 16:50:09 -04:00
bw_fixed.h	drm/amd/display: explicit uint64_t casting	2018-11-05 14:20:50 -05:00
clock_source.h	drm/amd/display: Keep clocks high before seamless boot done	2019-03-19 15:04:03 -05:00
compressor.h	drm/amd/display: fbc state could not reach while enable fbc	2018-11-30 12:02:35 -05:00
core_status.h	drm/amd/display: add set and get clock for testing purposes	2019-07-18 14:27:25 -05:00
core_types.h	drm/amd/display: remove unused code	2019-10-25 16:50:08 -04:00
custom_float.h	drm/amd/display: Enable regamma 25 segments and use double buffer.	2017-09-26 17:14:18 -04:00
dc_link_ddc.h	drm/amd/display: configurable aux timeout support	2019-10-17 16:24:56 -04:00
dc_link_dp.h	drm/amd/display: configurable aux timeout support	2019-10-17 16:24:56 -04:00
dce_calcs.h	drm/amdgpu/display: remove VEGAM config option	2018-05-18 16:08:18 -05:00
dcn_calcs.h	drm/amd/display: make clk mgr soc specific	2019-05-31 10:39:29 -05:00
hw_sequencer.h	drm/amd/display: Add renoir hw_seq	2019-10-17 16:27:34 -04:00
link_hwss.h	drm/amd/display: Synchronous DisplayPort Link Training	2019-08-15 10:53:30 -05:00
reg_helper.h	drm/amd/display: Combine field toggle macro and sequence write macro.	2019-03-19 15:36:49 -05:00
resource.h	drm/amd/display: dce11.x /dce12 update formula input	2019-09-13 18:03:21 -05:00
vm_helper.h	drm/amd/display: move vmid determination logic to a module	2019-06-22 09:34:14 -05:00