forked from Minki/linux
3abd5acfff
The Timer64p timer has 8 compare registers that can be used to generate interrupts when the timer value matches the compare reg's value. They do not disturb the timer itself. This can be useful when there is only one timer available for both clock events and clocksource. When enabled, the clocksource remains a continuous 32-bit counter but the clock event will no longer support periodic interrupts. Instead only oneshot timers will be supported and implemented by setting the compare register to the current timer value plus the period that the clock event subsystem is requesting. Compare registers support is enabled automatically when the following conditions are met: 1) The same timer is being used for clock events and clocksource. 2) The timer is the bottom half (32 bits) of the 64-bit timer (hardware limitation). 3) The the compare register offset and irq are not zero. Since the timer is always running, there is a hardware race in timer32_config() between reading the current timer value, and adding the period to the current timer value and writing the compare register. Testing on a da830 evm board with the timer clocked at 24 MHz and the processor clocked at 300 MHz, showed the number of counter ticks to do this ranged from 20-53 (~1-2.2 usecs) but usually around 41 ticks. This includes some artifacts from collecting the information. So, the minimum period should be at least 5 usecs to be safe. There is also an non-critical lower limit that the period should be since there is no point in setting an event that is much shorter than the time it takes to set the event, and get & handle the timer interrupt for that event. There can also be all sorts of delays from activities occuring elsewhere in the system (including hardware activitis like cache & TLB management). These are virtually impossible to quantify so a minimum period of 50 usecs was chosen. That will certianly be enough to avoid the actual hardware race but hopefully not large enough to cause unreasonably course-grained timers. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
76 lines
2.0 KiB
C
76 lines
2.0 KiB
C
/*
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* Header for code common to all DaVinci machines.
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
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#define __ARCH_ARM_MACH_DAVINCI_COMMON_H
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struct sys_timer;
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extern struct sys_timer davinci_timer;
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extern void davinci_irq_init(void);
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extern void __iomem *davinci_intc_base;
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extern int davinci_intc_type;
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/* parameters describe VBUS sourcing for host mode */
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extern void setup_usb(unsigned mA, unsigned potpgt_msec);
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/* parameters describe VBUS sourcing for host mode */
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extern void setup_usb(unsigned mA, unsigned potpgt_msec);
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struct davinci_timer_instance {
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void __iomem *base;
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u32 bottom_irq;
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u32 top_irq;
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unsigned long cmp_off;
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unsigned int cmp_irq;
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};
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struct davinci_timer_info {
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struct davinci_timer_instance *timers;
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unsigned int clockevent_id;
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unsigned int clocksource_id;
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};
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/* SoC specific init support */
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struct davinci_soc_info {
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struct map_desc *io_desc;
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unsigned long io_desc_num;
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u32 cpu_id;
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u32 jtag_id;
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void __iomem *jtag_id_base;
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struct davinci_id *ids;
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unsigned long ids_num;
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struct davinci_clk *cpu_clks;
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void __iomem **psc_bases;
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unsigned long psc_bases_num;
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void __iomem *pinmux_base;
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const struct mux_config *pinmux_pins;
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unsigned long pinmux_pins_num;
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void __iomem *intc_base;
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int intc_type;
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u8 *intc_irq_prios;
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unsigned long intc_irq_num;
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struct davinci_timer_info *timer_info;
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void __iomem *wdt_base;
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void __iomem *gpio_base;
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unsigned gpio_num;
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unsigned gpio_irq;
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struct platform_device *serial_dev;
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struct emac_platform_data *emac_pdata;
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};
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extern struct davinci_soc_info davinci_soc_info;
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extern void davinci_common_init(struct davinci_soc_info *soc_info);
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#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */
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