forked from Minki/linux
aaa36a976b
This adds initial support for VI asics. This includes Iceland, Tonga, and Carrizo. Our inital focus as been Carrizo, so there are still gaps in support for Tonga and Iceland, notably power management. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
199 lines
9.7 KiB
C
199 lines
9.7 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef TONGA_PP_SMC_H
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#define TONGA_PP_SMC_H
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#pragma pack(push, 1)
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#define PPSMC_SWSTATE_FLAG_DC 0x01
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#define PPSMC_SWSTATE_FLAG_UVD 0x02
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#define PPSMC_SWSTATE_FLAG_VCE 0x04
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#define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
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#define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
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#define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
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#define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
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#define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
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#define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
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#define PPSMC_SYSTEMFLAG_GDDR5 0x04
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#define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
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#define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10
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#define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG 0x20
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#define PPSMC_SYSTEMFLAG_12CHANNEL 0x40
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07
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#define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01
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#define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH 0x10
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#define PPSMC_EXTRAFLAGS_DRIVER_TO_GPIO17 0x20
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#define PPSMC_EXTRAFLAGS_PCC_TO_GPIO17 0x40
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#define PPSMC_DPM2FLAGS_TDPCLMP 0x01
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#define PPSMC_DPM2FLAGS_PWRSHFT 0x02
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#define PPSMC_DPM2FLAGS_OCP 0x04
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#define PPSMC_DISPLAY_WATERMARK_LOW 0
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#define PPSMC_DISPLAY_WATERMARK_HIGH 1
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#define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01
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#define PPSMC_STATEFLAG_POWERBOOST 0x02
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#define PPSMC_STATEFLAG_PSKIP_ON_TDP_FAULT 0x04
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#define PPSMC_STATEFLAG_POWERSHIFT 0x08
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#define PPSMC_STATEFLAG_SLOW_READ_MARGIN 0x10
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#define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
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#define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS 0x40
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#define FDO_MODE_HARDWARE 0
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#define FDO_MODE_PIECE_WISE_LINEAR 1
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enum FAN_CONTROL {
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FAN_CONTROL_FUZZY,
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FAN_CONTROL_TABLE
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};
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#define PPSMC_Result_OK ((uint16_t)0x01)
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#define PPSMC_Result_NoMore ((uint16_t)0x02)
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#define PPSMC_Result_NotNow ((uint16_t)0x03)
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#define PPSMC_Result_Failed ((uint16_t)0xFF)
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#define PPSMC_Result_UnknownCmd ((uint16_t)0xFE)
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#define PPSMC_Result_UnknownVT ((uint16_t)0xFD)
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typedef uint16_t PPSMC_Result;
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#define PPSMC_isERROR(x) ((uint16_t)0x80 & (x))
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#define PPSMC_MSG_Halt ((uint16_t)0x10)
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#define PPSMC_MSG_Resume ((uint16_t)0x11)
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#define PPSMC_MSG_EnableDPMLevel ((uint16_t)0x12)
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#define PPSMC_MSG_ZeroLevelsDisabled ((uint16_t)0x13)
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#define PPSMC_MSG_OneLevelsDisabled ((uint16_t)0x14)
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#define PPSMC_MSG_TwoLevelsDisabled ((uint16_t)0x15)
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#define PPSMC_MSG_EnableThermalInterrupt ((uint16_t)0x16)
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#define PPSMC_MSG_RunningOnAC ((uint16_t)0x17)
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#define PPSMC_MSG_LevelUp ((uint16_t)0x18)
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#define PPSMC_MSG_LevelDown ((uint16_t)0x19)
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#define PPSMC_MSG_ResetDPMCounters ((uint16_t)0x1a)
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#define PPSMC_MSG_SwitchToSwState ((uint16_t)0x20)
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#define PPSMC_MSG_SwitchToSwStateLast ((uint16_t)0x3f)
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#define PPSMC_MSG_SwitchToInitialState ((uint16_t)0x40)
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#define PPSMC_MSG_NoForcedLevel ((uint16_t)0x41)
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#define PPSMC_MSG_ForceHigh ((uint16_t)0x42)
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#define PPSMC_MSG_ForceMediumOrHigh ((uint16_t)0x43)
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#define PPSMC_MSG_SwitchToMinimumPower ((uint16_t)0x51)
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#define PPSMC_MSG_ResumeFromMinimumPower ((uint16_t)0x52)
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#define PPSMC_MSG_EnableCac ((uint16_t)0x53)
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#define PPSMC_MSG_DisableCac ((uint16_t)0x54)
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#define PPSMC_DPMStateHistoryStart ((uint16_t)0x55)
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#define PPSMC_DPMStateHistoryStop ((uint16_t)0x56)
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#define PPSMC_CACHistoryStart ((uint16_t)0x57)
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#define PPSMC_CACHistoryStop ((uint16_t)0x58)
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#define PPSMC_TDPClampingActive ((uint16_t)0x59)
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#define PPSMC_TDPClampingInactive ((uint16_t)0x5A)
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#define PPSMC_StartFanControl ((uint16_t)0x5B)
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#define PPSMC_StopFanControl ((uint16_t)0x5C)
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#define PPSMC_NoDisplay ((uint16_t)0x5D)
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#define PPSMC_HasDisplay ((uint16_t)0x5E)
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#define PPSMC_MSG_UVDPowerOFF ((uint16_t)0x60)
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#define PPSMC_MSG_UVDPowerON ((uint16_t)0x61)
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#define PPSMC_MSG_EnableULV ((uint16_t)0x62)
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#define PPSMC_MSG_DisableULV ((uint16_t)0x63)
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#define PPSMC_MSG_EnterULV ((uint16_t)0x64)
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#define PPSMC_MSG_ExitULV ((uint16_t)0x65)
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#define PPSMC_PowerShiftActive ((uint16_t)0x6A)
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#define PPSMC_PowerShiftInactive ((uint16_t)0x6B)
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#define PPSMC_OCPActive ((uint16_t)0x6C)
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#define PPSMC_OCPInactive ((uint16_t)0x6D)
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#define PPSMC_CACLongTermAvgEnable ((uint16_t)0x6E)
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#define PPSMC_CACLongTermAvgDisable ((uint16_t)0x6F)
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#define PPSMC_MSG_InferredStateSweep_Start ((uint16_t)0x70)
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#define PPSMC_MSG_InferredStateSweep_Stop ((uint16_t)0x71)
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#define PPSMC_MSG_SwitchToLowestInfState ((uint16_t)0x72)
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#define PPSMC_MSG_SwitchToNonInfState ((uint16_t)0x73)
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#define PPSMC_MSG_AllStateSweep_Start ((uint16_t)0x74)
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#define PPSMC_MSG_AllStateSweep_Stop ((uint16_t)0x75)
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#define PPSMC_MSG_SwitchNextLowerInfState ((uint16_t)0x76)
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#define PPSMC_MSG_SwitchNextHigherInfState ((uint16_t)0x77)
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#define PPSMC_MSG_MclkRetrainingTest ((uint16_t)0x78)
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#define PPSMC_MSG_ForceTDPClamping ((uint16_t)0x79)
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#define PPSMC_MSG_CollectCAC_PowerCorreln ((uint16_t)0x7A)
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#define PPSMC_MSG_CollectCAC_WeightCalib ((uint16_t)0x7B)
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#define PPSMC_MSG_CollectCAC_SQonly ((uint16_t)0x7C)
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#define PPSMC_MSG_CollectCAC_TemperaturePwr ((uint16_t)0x7D)
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#define PPSMC_MSG_ExtremitiesTest_Start ((uint16_t)0x7E)
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#define PPSMC_MSG_ExtremitiesTest_Stop ((uint16_t)0x7F)
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#define PPSMC_FlushDataCache ((uint16_t)0x80)
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#define PPSMC_FlushInstrCache ((uint16_t)0x81)
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#define PPSMC_MSG_SetEnabledLevels ((uint16_t)0x82)
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#define PPSMC_MSG_SetForcedLevels ((uint16_t)0x83)
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#define PPSMC_MSG_ResetToDefaults ((uint16_t)0x84)
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#define PPSMC_MSG_SetForcedLevelsAndJump ((uint16_t)0x85)
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#define PPSMC_MSG_SetCACHistoryMode ((uint16_t)0x86)
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#define PPSMC_MSG_EnableDTE ((uint16_t)0x87)
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#define PPSMC_MSG_DisableDTE ((uint16_t)0x88)
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#define PPSMC_MSG_SmcSpaceSetAddress ((uint16_t)0x89)
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#define PPSMC_MSG_SmcSpaceWriteDWordInc ((uint16_t)0x8A)
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#define PPSMC_MSG_SmcSpaceWriteWordInc ((uint16_t)0x8B)
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#define PPSMC_MSG_SmcSpaceWriteByteInc ((uint16_t)0x8C)
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#define PPSMC_MSG_ChangeNearTDPLimit ((uint16_t)0x90)
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#define PPSMC_MSG_ChangeSafePowerLimit ((uint16_t)0x91)
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#define PPSMC_MSG_DPMStateSweepStart ((uint16_t)0x92)
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#define PPSMC_MSG_DPMStateSweepStop ((uint16_t)0x93)
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#define PPSMC_MSG_OVRDDisableSCLKDS ((uint16_t)0x94)
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#define PPSMC_MSG_CancelDisableOVRDSCLKDS ((uint16_t)0x95)
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#define PPSMC_MSG_ThrottleOVRDSCLKDS ((uint16_t)0x96)
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#define PPSMC_MSG_CancelThrottleOVRDSCLKDS ((uint16_t)0x97)
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#define PPSMC_MSG_GPIO17 ((uint16_t)0x98)
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#define PPSMC_MSG_API_SetSvi2Volt_Vddc ((uint16_t)0x99)
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#define PPSMC_MSG_API_SetSvi2Volt_Vddci ((uint16_t)0x9A)
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#define PPSMC_MSG_API_SetSvi2Volt_Mvdd ((uint16_t)0x9B)
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#define PPSMC_MSG_API_GetSvi2Volt_Vddc ((uint16_t)0x9C)
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#define PPSMC_MSG_API_GetSvi2Volt_Vddci ((uint16_t)0x9D)
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#define PPSMC_MSG_API_GetSvi2Volt_Mvdd ((uint16_t)0x9E)
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#define PPSMC_MSG_BREAK ((uint16_t)0xF8)
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#define PPSMC_MSG_Test ((uint16_t)0x100)
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#define PPSMC_MSG_DRV_DRAM_ADDR_HI ((uint16_t)0x250)
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#define PPSMC_MSG_DRV_DRAM_ADDR_LO ((uint16_t)0x251)
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#define PPSMC_MSG_SMU_DRAM_ADDR_HI ((uint16_t)0x252)
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#define PPSMC_MSG_SMU_DRAM_ADDR_LO ((uint16_t)0x253)
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#define PPSMC_MSG_LoadUcodes ((uint16_t)0x254)
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typedef uint16_t PPSMC_Msg;
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#define PPSMC_EVENT_STATUS_THERMAL 0x00000001
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#define PPSMC_EVENT_STATUS_REGULATORHOT 0x00000002
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#define PPSMC_EVENT_STATUS_DC 0x00000004
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#define PPSMC_EVENT_STATUS_GPIO17 0x00000008
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#pragma pack(pop)
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#endif
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