[Description] This is for HW negative stress testing use. force reset the dispclk and dppclk even the same clock already set in HW. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
||
---|---|---|
.. | ||
dce100 | ||
dce110 | ||
dce112 | ||
dce120 | ||
dcn10 | ||
dcn20 | ||
clk_mgr.c | ||
Makefile |