296523d933
Add compatible for Samsung k3qf2f20db LPDDR3 memory bindings, based on at25.txt compatible section. Introduce minor fixes in the old documentation. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
102 lines
2.4 KiB
Plaintext
102 lines
2.4 KiB
Plaintext
* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
|
|
|
|
Required properties:
|
|
- compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
|
|
Example "<vendor>,<type>" values:
|
|
"samsung,K3QF2F20DB"
|
|
|
|
- density : <u32> representing density in Mb (Mega bits)
|
|
- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
|
|
- #address-cells: Must be set to 1
|
|
- #size-cells: Must be set to 0
|
|
|
|
Optional properties:
|
|
|
|
The following optional properties represent the minimum value of some AC
|
|
timing parameters of the DDR device in terms of number of clock cycles.
|
|
These values shall be obtained from the device data-sheet.
|
|
- tRFC-min-tck
|
|
- tRRD-min-tck
|
|
- tRPab-min-tck
|
|
- tRPpb-min-tck
|
|
- tRCD-min-tck
|
|
- tRC-min-tck
|
|
- tRAS-min-tck
|
|
- tWTR-min-tck
|
|
- tWR-min-tck
|
|
- tRTP-min-tck
|
|
- tW2W-C2C-min-tck
|
|
- tR2R-C2C-min-tck
|
|
- tWL-min-tck
|
|
- tDQSCK-min-tck
|
|
- tRL-min-tck
|
|
- tFAW-min-tck
|
|
- tXSR-min-tck
|
|
- tXP-min-tck
|
|
- tCKE-min-tck
|
|
- tCKESR-min-tck
|
|
- tMRD-min-tck
|
|
|
|
Child nodes:
|
|
- The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
|
|
"lpddr3-timings" provides AC timing parameters of the device for
|
|
a given speed-bin. Please see Documentation/devicetree/
|
|
bindings/ddr/lpddr3-timings.txt for more information on "lpddr3-timings"
|
|
|
|
Example:
|
|
|
|
samsung_K3QF2F20DB: lpddr3 {
|
|
compatible = "samsung,K3QF2F20DB", "jedec,lpddr3";
|
|
density = <16384>;
|
|
io-width = <32>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
tRFC-min-tck = <17>;
|
|
tRRD-min-tck = <2>;
|
|
tRPab-min-tck = <2>;
|
|
tRPpb-min-tck = <2>;
|
|
tRCD-min-tck = <3>;
|
|
tRC-min-tck = <6>;
|
|
tRAS-min-tck = <5>;
|
|
tWTR-min-tck = <2>;
|
|
tWR-min-tck = <7>;
|
|
tRTP-min-tck = <2>;
|
|
tW2W-C2C-min-tck = <0>;
|
|
tR2R-C2C-min-tck = <0>;
|
|
tWL-min-tck = <8>;
|
|
tDQSCK-min-tck = <5>;
|
|
tRL-min-tck = <14>;
|
|
tFAW-min-tck = <5>;
|
|
tXSR-min-tck = <12>;
|
|
tXP-min-tck = <2>;
|
|
tCKE-min-tck = <2>;
|
|
tCKESR-min-tck = <2>;
|
|
tMRD-min-tck = <5>;
|
|
|
|
timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
|
|
compatible = "jedec,lpddr3-timings";
|
|
/* workaround: 'reg' shows max-freq */
|
|
reg = <800000000>;
|
|
min-freq = <100000000>;
|
|
tRFC = <65000>;
|
|
tRRD = <6000>;
|
|
tRPab = <12000>;
|
|
tRPpb = <12000>;
|
|
tRCD = <10000>;
|
|
tRC = <33750>;
|
|
tRAS = <23000>;
|
|
tWTR = <3750>;
|
|
tWR = <7500>;
|
|
tRTP = <3750>;
|
|
tW2W-C2C = <0>;
|
|
tR2R-C2C = <0>;
|
|
tFAW = <25000>;
|
|
tXSR = <70000>;
|
|
tXP = <3750>;
|
|
tCKE = <3750>;
|
|
tCKESR = <3750>;
|
|
tMRD = <7000>;
|
|
};
|
|
}
|