linux/arch/riscv/mm
Zong Li 395a21ff85
riscv: add ARCH_HAS_SET_DIRECT_MAP support
Add set_direct_map_*() functions for setting the direct map alias for
the page to its default permissions and to an invalid state that cannot
be cached in a TLB. (See d253ca0c ("x86/mm/cpa: Add set_direct_map_*()
functions")) Add a similar implementation for RISC-V.

Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-26 09:24:33 -07:00
..
cacheflush.c riscv: export flush_icache_all to modules 2019-12-27 21:51:01 -08:00
context.c riscv: add nommu support 2019-11-17 15:17:39 -08:00
extable.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
fault.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
hugetlbpage.c riscv: Use p*d_leaf macros to define p*d_huge 2020-03-05 13:09:59 -08:00
init.c riscv: mm: use __pa_symbol for kernel symbols 2020-01-03 00:33:34 -08:00
kasan_init.c riscv: adjust the indent 2020-02-24 13:12:53 -08:00
Makefile riscv: add ARCH_HAS_SET_MEMORY support 2020-03-26 09:24:30 -07:00
pageattr.c riscv: add ARCH_HAS_SET_DIRECT_MAP support 2020-03-26 09:24:33 -07:00
physaddr.c riscv: mm: add support for CONFIG_DEBUG_VIRTUAL 2020-01-23 10:40:06 -08:00
tlbflush.c RISC-V: Issue a tlb page flush if possible 2019-10-29 11:32:18 -07:00