Michal Simek 3880c39a80 ARM: zynq: Rename bus to be align with simple-bus yaml ... Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI point-to-point channels for communicating addresses, data, and response transactions between master and slave clients. This ARM AMBA 3.0..." Issues are reported as: .. amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' >From schema: ../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml Similar change has been done for Xilinx ZynqMP SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com		2020-12-09 15:18:27 +01:00
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bootp
compressed	ARM development for 5.10-rc1:	2020-10-20 09:18:31 -07:00
dts	ARM: zynq: Rename bus to be align with simple-bus yaml	2020-12-09 15:18:27 +01:00
.gitignore
deflate_xip_data.sh
install.sh
Makefile