7a873e4555
Extend the KVM_SET_SREGS test to verify that all supported CR4 bits, as enumerated by KVM, can be set before KVM_SET_CPUID2, i.e. without first defining the vCPU model. KVM is supposed to skip guest CPUID checks when host userspace is stuffing guest state. Check the inverse as well, i.e. that KVM rejects KVM_SET_REGS if CR4 has one or more unsupported bits set. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20201007014417.29276-7-sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
143 lines
4.0 KiB
C
143 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* KVM_SET_SREGS tests
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*
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* Copyright (C) 2018, Google LLC.
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*
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* This is a regression test for the bug fixed by the following commit:
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* d3802286fa0f ("kvm: x86: Disallow illegal IA32_APIC_BASE MSR values")
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*
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* That bug allowed a user-mode program that called the KVM_SET_SREGS
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* ioctl to put a VCPU's local APIC into an invalid state.
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*/
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#define _GNU_SOURCE /* for program_invocation_short_name */
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include "test_util.h"
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#include "kvm_util.h"
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#include "processor.h"
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#define VCPU_ID 5
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static void test_cr4_feature_bit(struct kvm_vm *vm, struct kvm_sregs *orig,
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uint64_t feature_bit)
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{
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struct kvm_sregs sregs;
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int rc;
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/* Skip the sub-test, the feature is supported. */
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if (orig->cr4 & feature_bit)
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return;
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memcpy(&sregs, orig, sizeof(sregs));
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sregs.cr4 |= feature_bit;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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TEST_ASSERT(rc, "KVM allowed unsupported CR4 bit (0x%lx)", feature_bit);
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/* Sanity check that KVM didn't change anything. */
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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TEST_ASSERT(!memcmp(&sregs, orig, sizeof(sregs)), "KVM modified sregs");
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}
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static uint64_t calc_cr4_feature_bits(struct kvm_vm *vm)
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{
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struct kvm_cpuid_entry2 *cpuid_1, *cpuid_7;
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uint64_t cr4;
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cpuid_1 = kvm_get_supported_cpuid_entry(1);
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cpuid_7 = kvm_get_supported_cpuid_entry(7);
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cr4 = X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE |
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X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE | X86_CR4_PGE |
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X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT;
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if (cpuid_7->ecx & CPUID_UMIP)
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cr4 |= X86_CR4_UMIP;
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if (cpuid_7->ecx & CPUID_LA57)
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cr4 |= X86_CR4_LA57;
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if (cpuid_1->ecx & CPUID_VMX)
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cr4 |= X86_CR4_VMXE;
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if (cpuid_1->ecx & CPUID_SMX)
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cr4 |= X86_CR4_SMXE;
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if (cpuid_7->ebx & CPUID_FSGSBASE)
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cr4 |= X86_CR4_FSGSBASE;
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if (cpuid_1->ecx & CPUID_PCID)
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cr4 |= X86_CR4_PCIDE;
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if (cpuid_1->ecx & CPUID_XSAVE)
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cr4 |= X86_CR4_OSXSAVE;
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if (cpuid_7->ebx & CPUID_SMEP)
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cr4 |= X86_CR4_SMEP;
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if (cpuid_7->ebx & CPUID_SMAP)
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cr4 |= X86_CR4_SMAP;
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if (cpuid_7->ecx & CPUID_PKU)
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cr4 |= X86_CR4_PKE;
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return cr4;
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}
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int main(int argc, char *argv[])
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{
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struct kvm_sregs sregs;
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struct kvm_vm *vm;
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uint64_t cr4;
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int rc;
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/* Tell stdout not to buffer its content */
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setbuf(stdout, NULL);
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/*
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* Create a dummy VM, specifically to avoid doing KVM_SET_CPUID2, and
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* use it to verify all supported CR4 bits can be set prior to defining
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* the vCPU model, i.e. without doing KVM_SET_CPUID2.
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*/
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vm = vm_create(VM_MODE_DEFAULT, DEFAULT_GUEST_PHY_PAGES, O_RDWR);
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vm_vcpu_add(vm, VCPU_ID);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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sregs.cr4 |= calc_cr4_feature_bits(vm);
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cr4 = sregs.cr4;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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TEST_ASSERT(sregs.cr4 == cr4, "sregs.CR4 (0x%llx) != CR4 (0x%lx)",
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sregs.cr4, cr4);
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/* Verify all unsupported features are rejected by KVM. */
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test_cr4_feature_bit(vm, &sregs, X86_CR4_UMIP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_LA57);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_VMXE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMXE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_FSGSBASE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_PCIDE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_OSXSAVE);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMEP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_SMAP);
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test_cr4_feature_bit(vm, &sregs, X86_CR4_PKE);
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kvm_vm_free(vm);
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/* Create a "real" VM and verify APIC_BASE can be set. */
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vm = vm_create_default(VCPU_ID, 0, NULL);
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vcpu_sregs_get(vm, VCPU_ID, &sregs);
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sregs.apic_base = 1 << 10;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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TEST_ASSERT(rc, "Set IA32_APIC_BASE to %llx (invalid)",
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sregs.apic_base);
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sregs.apic_base = 1 << 11;
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rc = _vcpu_sregs_set(vm, VCPU_ID, &sregs);
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TEST_ASSERT(!rc, "Couldn't set IA32_APIC_BASE to %llx (valid)",
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sregs.apic_base);
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kvm_vm_free(vm);
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return 0;
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}
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