c9c12d339d
This patch adds PTP clock and uses it in Octeontx2 network device. PTP clock uses mailbox calls to access the hardware counter on the RVU side. Co-developed-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Aleksey Makarov <amakarov@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
14 lines
353 B
C
14 lines
353 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Marvell OcteonTx2 PTP support for ethernet driver */
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#ifndef OTX2_PTP_H
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#define OTX2_PTP_H
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int otx2_ptp_init(struct otx2_nic *pfvf);
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void otx2_ptp_destroy(struct otx2_nic *pfvf);
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int otx2_ptp_clock_index(struct otx2_nic *pfvf);
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int otx2_ptp_tstamp2time(struct otx2_nic *pfvf, u64 tstamp, u64 *tsns);
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#endif
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