51e40a0dbe
The A10/A20 Allwinner SoCs have two camera sensor interface blocks,
named CSI0 and CSI1. The two have the same register layouts with
slightly different features:
- CSI0 has an image signal processor (ISP); CSI1 doesn't
- CSI0 can support up to four separate channels under CCIR656;
CSI1 can only support one
- CSI0 can support up to 16-bit wide bus with YUV422;
CSI1 can support up to 24-bit wide bus with YUV444
For now the driver doesn't support wide busses, nor CCIR656. So the
only relevant difference is whether a clock needs to be taken and
enabled for the ISP.
Add structs to record the differences, tie them to the compatible
strings, and deal with the ISP clock. Support for the new CSI1
hardware block is added as well.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
163 lines
3.5 KiB
C
163 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 NextThing Co
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* Copyright (C) 2016-2019 Bootlin
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*
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* Author: Maxime Ripard <maxime.ripard@bootlin.com>
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*/
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#ifndef _SUN4I_CSI_H_
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#define _SUN4I_CSI_H_
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#include <media/media-device.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-dev.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-fwnode.h>
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#include <media/videobuf2-core.h>
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#define CSI_EN_REG 0x00
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#define CSI_CFG_REG 0x04
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#define CSI_CFG_INPUT_FMT(fmt) ((fmt) << 20)
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#define CSI_CFG_OUTPUT_FMT(fmt) ((fmt) << 16)
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#define CSI_CFG_YUV_DATA_SEQ(seq) ((seq) << 8)
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#define CSI_CFG_VREF_POL(pol) ((pol) << 2)
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#define CSI_CFG_HREF_POL(pol) ((pol) << 1)
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#define CSI_CFG_PCLK_POL(pol) ((pol) << 0)
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#define CSI_CPT_CTRL_REG 0x08
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#define CSI_CPT_CTRL_VIDEO_START BIT(1)
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#define CSI_CPT_CTRL_IMAGE_START BIT(0)
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#define CSI_BUF_ADDR_REG(fifo, buf) (0x10 + (0x8 * (fifo)) + (0x4 * (buf)))
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#define CSI_BUF_CTRL_REG 0x28
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#define CSI_BUF_CTRL_DBN BIT(2)
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#define CSI_BUF_CTRL_DBS BIT(1)
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#define CSI_BUF_CTRL_DBE BIT(0)
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#define CSI_INT_EN_REG 0x30
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#define CSI_INT_FRM_DONE BIT(1)
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#define CSI_INT_CPT_DONE BIT(0)
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#define CSI_INT_STA_REG 0x34
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#define CSI_WIN_CTRL_W_REG 0x40
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#define CSI_WIN_CTRL_W_ACTIVE(w) ((w) << 16)
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#define CSI_WIN_CTRL_H_REG 0x44
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#define CSI_WIN_CTRL_H_ACTIVE(h) ((h) << 16)
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#define CSI_BUF_LEN_REG 0x48
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#define CSI_MAX_BUFFER 2
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#define CSI_MAX_HEIGHT 8192U
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#define CSI_MAX_WIDTH 8192U
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enum csi_input {
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CSI_INPUT_RAW = 0,
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CSI_INPUT_BT656 = 2,
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CSI_INPUT_YUV = 3,
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};
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enum csi_output_raw {
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CSI_OUTPUT_RAW_PASSTHROUGH = 0,
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};
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enum csi_output_yuv {
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CSI_OUTPUT_YUV_422_PLANAR = 0,
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CSI_OUTPUT_YUV_420_PLANAR = 1,
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CSI_OUTPUT_YUV_422_UV = 4,
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CSI_OUTPUT_YUV_420_UV = 5,
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CSI_OUTPUT_YUV_422_MACRO = 8,
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CSI_OUTPUT_YUV_420_MACRO = 9,
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};
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enum csi_yuv_data_seq {
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CSI_YUV_DATA_SEQ_YUYV = 0,
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CSI_YUV_DATA_SEQ_YVYU = 1,
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CSI_YUV_DATA_SEQ_UYVY = 2,
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CSI_YUV_DATA_SEQ_VYUY = 3,
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};
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enum csi_subdev_pads {
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CSI_SUBDEV_SINK,
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CSI_SUBDEV_SOURCE,
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CSI_SUBDEV_PADS,
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};
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extern const struct v4l2_subdev_ops sun4i_csi_subdev_ops;
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struct sun4i_csi_format {
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u32 mbus;
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u32 fourcc;
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enum csi_input input;
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u32 output;
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unsigned int num_planes;
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u8 bpp[3];
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unsigned int hsub;
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unsigned int vsub;
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};
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const struct sun4i_csi_format *sun4i_csi_find_format(const u32 *fourcc,
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const u32 *mbus);
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struct sun4i_csi {
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/* Device resources */
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struct device *dev;
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const struct sun4i_csi_traits *traits;
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void __iomem *regs;
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struct clk *bus_clk;
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struct clk *isp_clk;
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struct clk *ram_clk;
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struct reset_control *rst;
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struct vb2_v4l2_buffer *current_buf[CSI_MAX_BUFFER];
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struct {
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size_t size;
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void *vaddr;
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dma_addr_t paddr;
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} scratch;
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struct v4l2_fwnode_bus_parallel bus;
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/* Main Device */
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struct v4l2_device v4l;
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struct media_device mdev;
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struct video_device vdev;
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struct media_pad vdev_pad;
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struct v4l2_pix_format_mplane fmt;
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/* Local subdev */
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struct v4l2_subdev subdev;
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struct media_pad subdev_pads[CSI_SUBDEV_PADS];
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struct v4l2_mbus_framefmt subdev_fmt;
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/* V4L2 Async variables */
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struct v4l2_async_subdev asd;
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struct v4l2_async_notifier notifier;
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struct v4l2_subdev *src_subdev;
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int src_pad;
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/* V4L2 variables */
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struct mutex lock;
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/* Videobuf2 */
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struct vb2_queue queue;
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struct list_head buf_list;
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spinlock_t qlock;
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unsigned int sequence;
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};
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int sun4i_csi_dma_register(struct sun4i_csi *csi, int irq);
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void sun4i_csi_dma_unregister(struct sun4i_csi *csi);
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int sun4i_csi_v4l2_register(struct sun4i_csi *csi);
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#endif /* _SUN4I_CSI_H_ */
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