Jake Wang 4aa9d658d2 drm/amd/display: always program DPPDTO unless not safe to lower ... [Why] We defer clock updates to after pipes have been programmed. In some instances we use DPPCLK that have been previously set to be "unused". This results in a brief window of time where underflow could occur. [How] During prepare bandwidth allow rn_update_clocks_update_dpp_dto to check each instance and compare previous clock to new clock. If new clock is higher than previous clock, program DPPDTO. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-12-23 15:02:47 -05:00
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rn_clk_mgr_vbios_smu.c	drm/amd/display: change SMU repsonse timeout to 2s.	2020-12-23 15:01:53 -05:00
rn_clk_mgr_vbios_smu.h	drm/amd/display: reduce sr_xxx_time by 3 us when ppt disable	2020-07-14 14:34:08 -04:00
rn_clk_mgr.c	drm/amd/display: always program DPPDTO unless not safe to lower	2020-12-23 15:02:47 -05:00
rn_clk_mgr.h	drm/amd/display: move dispclk vco freq to clk mgr base	2019-10-25 16:50:08 -04:00