forked from Minki/linux
b85a3ef4ac
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
33 lines
836 B
C
33 lines
836 B
C
/*
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* arch/arm/mach-zynq/include/mach/clkdev.h
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*
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* Copyright (C) 2011 Xilinx, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MACH_CLKDEV_H__
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#define __MACH_CLKDEV_H__
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#include <plat/clock.h>
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struct clk {
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unsigned long rate;
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const struct clk_ops *ops;
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const struct icst_params *params;
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void __iomem *vcoreg;
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};
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#define __clk_get(clk) ({ 1; })
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#define __clk_put(clk) do { } while (0)
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#endif
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