forked from Minki/linux
5a0015d626
The attached patches provides part 3 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
193 lines
4.0 KiB
C
193 lines
4.0 KiB
C
/*
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* linux/arch/xtensa/kernel/irq.c
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*
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* Xtensa built-in interrupt controller and some generic functions copied
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* from i386.
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*
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* Copyright (C) 2002 - 2005 Tensilica, Inc.
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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*
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* Chris Zankel <chris@zankel.net>
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* Kevin Chea
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*
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*/
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel_stat.h>
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#include <asm/uaccess.h>
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#include <asm/platform.h>
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static void enable_xtensa_irq(unsigned int irq);
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static void disable_xtensa_irq(unsigned int irq);
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static void mask_and_ack_xtensa(unsigned int irq);
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static void end_xtensa_irq(unsigned int irq);
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static unsigned int cached_irq_mask;
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atomic_t irq_err_count;
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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printk("unexpected IRQ trap at vector %02x\n", irq);
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}
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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unsigned int do_IRQ(int irq, struct pt_regs *regs)
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{
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 1KB free? */
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{
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unsigned long sp;
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__asm__ __volatile__ ("mov %0, a1\n" : "=a" (sp));
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sp &= THREAD_SIZE - 1;
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if (unlikely(sp < (sizeof(thread_info) + 1024)))
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printk("Stack overflow in do_IRQ: %ld\n",
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sp - sizeof(struct thread_info));
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}
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#endif
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__do_IRQ(irq, regs);
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irq_exit();
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return 1;
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}
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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for (j=0; j<NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "CPU%d ",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#endif
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seq_printf(p, " %14s", irq_desc[i].handler->typename);
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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seq_printf(p, "NMI: ");
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ", nmi_count(j));
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seq_putc(p, '\n');
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seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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}
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return 0;
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}
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/* shutdown is same as "disable" */
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#define shutdown_xtensa_irq disable_xtensa_irq
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static unsigned int startup_xtensa_irq(unsigned int irq)
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{
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enable_xtensa_irq(irq);
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return 0; /* never anything pending */
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}
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static struct hw_interrupt_type xtensa_irq_type = {
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"Xtensa-IRQ",
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startup_xtensa_irq,
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shutdown_xtensa_irq,
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enable_xtensa_irq,
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disable_xtensa_irq,
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mask_and_ack_xtensa,
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end_xtensa_irq
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};
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static inline void mask_irq(unsigned int irq)
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{
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cached_irq_mask &= ~(1 << irq);
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set_sr (cached_irq_mask, INTENABLE);
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}
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static inline void unmask_irq(unsigned int irq)
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{
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cached_irq_mask |= 1 << irq;
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set_sr (cached_irq_mask, INTENABLE);
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}
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static void disable_xtensa_irq(unsigned int irq)
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{
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unsigned long flags;
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local_save_flags(flags);
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mask_irq(irq);
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local_irq_restore(flags);
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}
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static void enable_xtensa_irq(unsigned int irq)
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{
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unsigned long flags;
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local_save_flags(flags);
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unmask_irq(irq);
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local_irq_restore(flags);
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}
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static void mask_and_ack_xtensa(unsigned int irq)
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{
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disable_xtensa_irq(irq);
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}
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static void end_xtensa_irq(unsigned int irq)
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{
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enable_xtensa_irq(irq);
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}
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void __init init_IRQ(void)
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{
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int i;
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for (i=0; i < XTENSA_NR_IRQS; i++)
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irq_desc[i].handler = &xtensa_irq_type;
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cached_irq_mask = 0;
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platform_init_irq();
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}
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