forked from Minki/linux
0e80bdc9a7
This patch is to fill the first descriptor just before granting the DMA engine so at the end of the xmit. The patch takes care about the algorithm adopted to mitigate the interrupts, then it fixes the last segment in case of no fragments. Moreover, this new implementation does not pass any "ter" field when prepare the descriptors because this is not necessary. The patch also details the memory barrier in the xmit. As final results, this patch guarantees the same performances but fixing a case if small datagram are sent. In fact, this kind of test is impacted if no coalesce is done. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
301 lines
7.6 KiB
C
301 lines
7.6 KiB
C
/*******************************************************************************
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This contains the functions to handle the normal descriptors.
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/stmmac.h>
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#include "common.h"
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#include "descs_com.h"
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static int ndesc_get_tx_status(void *data, struct stmmac_extra_stats *x,
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struct dma_desc *p, void __iomem *ioaddr)
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{
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struct net_device_stats *stats = (struct net_device_stats *)data;
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unsigned int tdes0 = p->des0;
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unsigned int tdes1 = p->des1;
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int ret = tx_done;
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/* Get tx owner first */
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if (unlikely(tdes0 & TDES0_OWN))
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return tx_dma_own;
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/* Verify tx error by looking at the last segment. */
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if (likely(!(tdes1 & TDES1_LAST_SEGMENT)))
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return tx_not_ls;
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if (unlikely(tdes0 & TDES0_ERROR_SUMMARY)) {
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if (unlikely(tdes0 & TDES0_UNDERFLOW_ERROR)) {
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x->tx_underflow++;
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stats->tx_fifo_errors++;
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}
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if (unlikely(tdes0 & TDES0_NO_CARRIER)) {
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x->tx_carrier++;
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stats->tx_carrier_errors++;
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}
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if (unlikely(tdes0 & TDES0_LOSS_CARRIER)) {
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x->tx_losscarrier++;
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stats->tx_carrier_errors++;
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}
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if (unlikely((tdes0 & TDES0_EXCESSIVE_DEFERRAL) ||
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(tdes0 & TDES0_EXCESSIVE_COLLISIONS) ||
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(tdes0 & TDES0_LATE_COLLISION))) {
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unsigned int collisions;
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collisions = (tdes0 & TDES0_COLLISION_COUNT_MASK) >> 3;
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stats->collisions += collisions;
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}
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ret = tx_err;
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}
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if (tdes0 & TDES0_VLAN_FRAME)
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x->tx_vlan++;
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if (unlikely(tdes0 & TDES0_DEFERRED))
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x->tx_deferred++;
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return ret;
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}
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static int ndesc_get_tx_len(struct dma_desc *p)
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{
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return (p->des1 & RDES1_BUFFER1_SIZE_MASK);
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}
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/* This function verifies if each incoming frame has some errors
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* and, if required, updates the multicast statistics.
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* In case of success, it returns good_frame because the GMAC device
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* is supposed to be able to compute the csum in HW. */
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static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x,
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struct dma_desc *p)
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{
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int ret = good_frame;
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unsigned int rdes0 = p->des0;
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struct net_device_stats *stats = (struct net_device_stats *)data;
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if (unlikely(rdes0 & RDES0_OWN))
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return dma_own;
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if (unlikely(!(rdes0 & RDES0_LAST_DESCRIPTOR))) {
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pr_warn("%s: Oversized frame spanned multiple buffers\n",
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__func__);
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stats->rx_length_errors++;
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return discard_frame;
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}
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if (unlikely(rdes0 & RDES0_ERROR_SUMMARY)) {
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if (unlikely(rdes0 & RDES0_DESCRIPTOR_ERROR))
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x->rx_desc++;
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if (unlikely(rdes0 & RDES0_SA_FILTER_FAIL))
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x->sa_filter_fail++;
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if (unlikely(rdes0 & RDES0_OVERFLOW_ERROR))
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x->overflow_error++;
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if (unlikely(rdes0 & RDES0_IPC_CSUM_ERROR))
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x->ipc_csum_error++;
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if (unlikely(rdes0 & RDES0_COLLISION)) {
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x->rx_collision++;
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stats->collisions++;
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}
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if (unlikely(rdes0 & RDES0_CRC_ERROR)) {
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x->rx_crc++;
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stats->rx_crc_errors++;
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}
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ret = discard_frame;
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}
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if (unlikely(rdes0 & RDES0_DRIBBLING))
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x->dribbling_bit++;
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if (unlikely(rdes0 & RDES0_LENGTH_ERROR)) {
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x->rx_length++;
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ret = discard_frame;
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}
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if (unlikely(rdes0 & RDES0_MII_ERROR)) {
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x->rx_mii++;
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ret = discard_frame;
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}
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#ifdef STMMAC_VLAN_TAG_USED
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if (rdes0 & RDES0_VLAN_TAG)
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x->vlan_tag++;
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#endif
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return ret;
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}
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static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
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int end)
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{
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p->des0 |= RDES0_OWN;
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p->des1 |= (BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK;
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if (mode == STMMAC_CHAIN_MODE)
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ndesc_rx_set_on_chain(p, end);
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else
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ndesc_rx_set_on_ring(p, end);
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if (disable_rx_ic)
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p->des1 |= RDES1_DISABLE_IC;
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}
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static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end)
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{
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p->des0 &= ~TDES0_OWN;
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if (mode == STMMAC_CHAIN_MODE)
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ndesc_tx_set_on_chain(p);
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else
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ndesc_end_tx_desc_on_ring(p, end);
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}
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static int ndesc_get_tx_owner(struct dma_desc *p)
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{
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return (p->des0 & TDES0_OWN) >> 31;
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}
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static void ndesc_set_tx_owner(struct dma_desc *p)
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{
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p->des0 |= TDES0_OWN;
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}
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static void ndesc_set_rx_owner(struct dma_desc *p)
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{
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p->des0 |= RDES0_OWN;
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}
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static int ndesc_get_tx_ls(struct dma_desc *p)
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{
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return (p->des1 & TDES1_LAST_SEGMENT) >> 30;
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}
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static void ndesc_release_tx_desc(struct dma_desc *p, int mode)
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{
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int ter = (p->des1 & TDES1_END_RING) >> 25;
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memset(p, 0, offsetof(struct dma_desc, des2));
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if (mode == STMMAC_CHAIN_MODE)
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ndesc_tx_set_on_chain(p);
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else
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ndesc_end_tx_desc_on_ring(p, ter);
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}
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static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own,
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bool ls)
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{
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unsigned int tdes1 = p->des1;
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if (mode == STMMAC_CHAIN_MODE)
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norm_set_tx_desc_len_on_chain(p, len);
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else
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norm_set_tx_desc_len_on_ring(p, len);
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if (is_fs)
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tdes1 |= TDES1_FIRST_SEGMENT;
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else
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tdes1 &= ~TDES1_FIRST_SEGMENT;
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if (likely(csum_flag))
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tdes1 |= (TX_CIC_FULL) << TDES1_CHECKSUM_INSERTION_SHIFT;
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else
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tdes1 &= ~(TX_CIC_FULL << TDES1_CHECKSUM_INSERTION_SHIFT);
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if (ls)
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tdes1 |= TDES1_LAST_SEGMENT;
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if (tx_own)
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tdes1 |= TDES0_OWN;
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p->des1 = tdes1;
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}
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static void ndesc_set_tx_ic(struct dma_desc *p)
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{
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p->des1 |= TDES1_INTERRUPT;
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}
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static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
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{
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unsigned int csum = 0;
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/* The type-1 checksum offload engines append the checksum at
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* the end of frame and the two bytes of checksum are added in
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* the length.
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* Adjust for that in the framelen for type-1 checksum offload
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* engines
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*/
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if (rx_coe_type == STMMAC_RX_COE_TYPE1)
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csum = 2;
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return (((p->des0 & RDES0_FRAME_LEN_MASK) >> RDES0_FRAME_LEN_SHIFT) -
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csum);
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}
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static void ndesc_enable_tx_timestamp(struct dma_desc *p)
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{
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p->des1 |= TDES1_TIME_STAMP_ENABLE;
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}
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static int ndesc_get_tx_timestamp_status(struct dma_desc *p)
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{
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return (p->des0 & TDES0_TIME_STAMP_STATUS) >> 17;
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}
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static u64 ndesc_get_timestamp(void *desc, u32 ats)
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{
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struct dma_desc *p = (struct dma_desc *)desc;
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u64 ns;
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ns = p->des2;
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/* convert high/sec time stamp value to nanosecond */
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ns += p->des3 * 1000000000ULL;
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return ns;
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}
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static int ndesc_get_rx_timestamp_status(void *desc, u32 ats)
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{
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struct dma_desc *p = (struct dma_desc *)desc;
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if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff))
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/* timestamp is corrupted, hence don't store it */
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return 0;
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else
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return 1;
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}
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const struct stmmac_desc_ops ndesc_ops = {
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.tx_status = ndesc_get_tx_status,
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.rx_status = ndesc_get_rx_status,
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.get_tx_len = ndesc_get_tx_len,
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.init_rx_desc = ndesc_init_rx_desc,
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.init_tx_desc = ndesc_init_tx_desc,
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.get_tx_owner = ndesc_get_tx_owner,
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.release_tx_desc = ndesc_release_tx_desc,
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.prepare_tx_desc = ndesc_prepare_tx_desc,
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.set_tx_ic = ndesc_set_tx_ic,
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.get_tx_ls = ndesc_get_tx_ls,
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.set_tx_owner = ndesc_set_tx_owner,
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.set_rx_owner = ndesc_set_rx_owner,
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.get_rx_frame_len = ndesc_get_rx_frame_len,
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.enable_tx_timestamp = ndesc_enable_tx_timestamp,
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.get_tx_timestamp_status = ndesc_get_tx_timestamp_status,
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.get_timestamp = ndesc_get_timestamp,
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.get_rx_timestamp_status = ndesc_get_rx_timestamp_status,
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};
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