374bf825e7
Convert the AUO b101ean01 from using a fixed mode to specifying a display timing with min/typ/max values. The AUO b101ean01's datasheet says: * Vertical blanking min is 12 * Horizontal blanking min is 60 * Pixel clock is between 65.3 MHz and 75 MHz The goal here is to be able to specify the proper timing in device tree to use on rk3288-veyron-minnie to match what the downstream kernel is using so that it can used the fixed PLL. Changes in v4: - display_timing for AUO b101ean01 new for v4. Changes in v6: - Rebased to drm-misc next - Added tags Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190711203455.125667-4-dianders@chromium.org |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| vga | ||
| Makefile | ||