Sebastian Hesselbarth e68f31f452 ARM: 7922/1: l2x0: add Marvell Tauros3 support ... This adds support for the Marvell Tauros3 cache controller which is compatible with pl310 cache controller but broadcasts L1 cache operations to L2 cache. While updating the binding documentation, clean up the list of possible compatibles. Also reorder driver compatibles to allow non-ARM derivated to be compatible to ARM cache controller compatibles. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2013-12-29 12:32:47 +00:00
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arm_timer.h
cache-l2x0.h	ARM: 7922/1: l2x0: add Marvell Tauros3 support	2013-12-29 12:32:47 +00:00
cache-tauros2.h	ARM: cache: add extra feature enable for tauros2	2012-08-16 16:16:27 +08:00
coresight.h	ARM: hardware: fix endian-ness in <hardware/coresight.h>	2013-10-19 20:46:35 +01:00
dec21285.h
entry-macro-iomd.S
icst.h
ioc.h
iomd.h
iop3xx-adma.h	dmaengine: remove DMA unmap from drivers	2013-11-14 11:04:38 -08:00
iop3xx.h	ARM: plat-iop: instantiate GPIO from platform device	2013-09-20 23:04:50 +02:00
iop_adma.h	dmaengine: remove DMA unmap from drivers	2013-11-14 11:04:38 -08:00
it8152.h	ARM: PCI: provide a default bus scan implementation	2012-05-13 17:12:17 +01:00
locomo.h
memc.h
sa1111.h	ARM: sa1111: move USB interface register definitions to ohci-sa1111.c	2012-03-24 11:30:12 +00:00
scoop.h
ssp.h
timer-sp.h	ARM: timer-sp: convert to use CLKSRC_OF init	2013-04-11 15:11:17 -05:00