Evan Quan 36f5f8a749 drm/amd/powerplay: valid Vega10 DPMTABLE_OD_UPDATE_VDDC settings V2 ... With user specified voltage(DPMTABLE_OD_UPDATE_VDDC), the AVFS will be disabled. However, the buggy code makes this actually not working as expected. - V2: clear all OD flags excpet DPMTABLE_OD_UPDATE_VDDC Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-05-24 12:20:52 -05:00
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drm	drm/amd/powerplay: valid Vega10 DPMTABLE_OD_UPDATE_VDDC settings V2	2019-05-24 12:20:52 -05:00
host1x	gpu: host1x: Program stream ID to bypass without SMMU	2019-04-11 17:40:35 +02:00
ipu-v3	gpu: ipu-v3: dp: fix CSC handling	2019-04-23 14:54:16 +02:00
vga	- qxl: Remove the conflicting framebuffers earlier	2019-03-14 11:37:46 +10:00
Makefile