Vivien Didelot a199d8b695 net: dsa: mv88e6xxx: add PPU operations ... Some Marvell chips can enable/disable the PPU on demand. This is needed to access the PHY registers when there is no indirection mechanism. Add two new ppu_enable and ppu_disable ops to describe this and finally get rid of the MV88E6XXX_FLAG_PPU* flags. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2016-12-06 11:32:28 -05:00
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chip.c	net: dsa: mv88e6xxx: add PPU operations	2016-12-06 11:32:28 -05:00
global1.c	net: dsa: mv88e6xxx: add PPU operations	2016-12-06 11:32:28 -05:00
global1.h	net: dsa: mv88e6xxx: add PPU operations	2016-12-06 11:32:28 -05:00
global2.c	net: dsa: mv88e6xxx: Reserved Management frames to CPU	2016-12-03 23:18:38 -05:00
global2.h	net: dsa: mv88e6xxx: Reserved Management frames to CPU	2016-12-03 23:18:38 -05:00
Kconfig	net: dsa: mv88e6xxx: Select IRQ_DOMAIN	2016-11-18 13:54:22 -05:00
Makefile	net: dsa: mv88e6xxx: add port files	2016-11-04 14:39:58 -04:00
mv88e6xxx.h	net: dsa: mv88e6xxx: add PPU operations	2016-12-06 11:32:28 -05:00
port.c	net: dsa: mv88e6xxx: Implement mv88e6390 pause control	2016-12-03 23:18:39 -05:00
port.h	net: dsa: mv88e6xxx: Implement mv88e6390 pause control	2016-12-03 23:18:39 -05:00