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34d9545b9f
linux/drivers/gpu/drm/msm
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Archit Taneja 34d9545b9f drm/msm/dsi: Reset both PHYs before clock operation for dual DSI 
In case of dual DSI, some registers in PHY1 have been programmed
during PLL0 clock's set_rate. The PHY1 reset called by host1 later
will silently reset those PHY1 registers. This change is to reset
and enable both PHYs before any PLL clock operation.

[Originally worked on by Hai Li <hali@codeaurora.org>. Fixed up
by Archit Taneja <architt@codeaurora.org>]

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-02-06 11:28:45 -05:00
..
adreno drm/msm: let gpu wire up it's own fault handler 2017-02-06 11:28:42 -05:00
dsi drm/msm/dsi: Reset both PHYs before clock operation for dual DSI 2017-02-06 11:28:45 -05:00
edp drm: bridge: Link encoder and bridge in core code 2016-12-18 16:31:45 +05:30
hdmi drm: bridge: Link encoder and bridge in core code 2016-12-18 16:31:45 +05:30
mdp drm/msm/mdp5: Add support for legacy cursor updates 2017-02-06 11:28:44 -05:00
Kconfig drm: add more MMU dependencies 2017-01-11 17:24:58 +01:00
Makefile drm/msm: gpu: Add support for the GPMU 2016-11-28 15:14:16 -05:00
msm_atomic.c drm/msm/mdp5: Add cursor planes 2017-02-06 11:28:44 -05:00
msm_debugfs.c drm/mm: Convert to drm_printer 2016-12-30 12:08:28 +01:00
msm_debugfs.h drm/msm: move debugfs code to it's own file 2016-05-08 10:16:02 -04:00
msm_drv.c drm/msm: drop _clk suffix from clk names 2017-02-06 11:28:42 -05:00
msm_drv.h drm/msm: Construct only one encoder for DSI 2017-02-06 11:28:43 -05:00
msm_fb.c drm: Nuke fb->pixel_format 2016-12-15 14:55:34 +02:00
msm_fbdev.c drm/msm: Stop using drm_framebuffer_unregister_private 2017-01-12 10:52:56 +01:00
msm_fence.c dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_fence.h dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_gem_prime.c drm/msm: change gem->vmap() to get/put 2016-07-16 10:09:07 -04:00
msm_gem_shrinker.c Merge branch 'linus' into locking/core, to pick up fixes 2016-11-22 12:37:38 +01:00
msm_gem_submit.c drm/msm: Verify that MSM_SUBMIT_BO_FLAGS are set 2016-12-29 15:03:00 -05:00
msm_gem_vma.c drm/msm: support multiple address spaces 2016-11-27 11:23:09 -05:00
msm_gem.c drm/msm: fix potential null ptr issue in non-iommu case 2017-01-13 10:23:00 -05:00
msm_gem.h drm/msm: convert iova to 64b 2016-11-28 15:14:08 -05:00
msm_gpu.c drm/msm: drop _clk suffix from clk names 2017-02-06 11:28:42 -05:00
msm_gpu.h drm/msm: gpu: Add A5XX target support 2016-11-28 15:14:15 -05:00
msm_iommu.c drm/msm: let gpu wire up it's own fault handler 2017-02-06 11:28:42 -05:00
msm_kms.h drm/msm: Set encoder's mode of operation using a kms func 2017-02-06 11:28:43 -05:00
msm_mmu.h drm/msm: let gpu wire up it's own fault handler 2017-02-06 11:28:42 -05:00
msm_perf.c gpu: use %pd 2016-08-07 23:38:48 -04:00
msm_rd.c drm/msm/rd: support for 64b iova 2016-11-28 15:14:08 -05:00
msm_ringbuffer.c drm/msm: Ensure that the hardware write pointer is valid 2016-12-29 15:02:58 -05:00
msm_ringbuffer.h drm/msm: add a3xx gpu support 2013-08-24 14:57:18 -04:00
NOTES drm/msm: add mdp5/apq8x74 2014-01-09 14:44:06 -05:00