forked from Minki/linux
74d25721ee
This adds basic chip support for Mediatek 2701. Signed-off-by: Erin Lo <erin.lo@mediatek.com> [matthias.bgg@gmail.com: Fixed reg address of mt2701-timer] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
/*
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* Device Tree support for Mediatek SoCs
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*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Matthias Brugger <matthias.bgg@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <asm/mach/arch.h>
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#include <linux/of.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#define GPT6_CON_MT65xx 0x10008060
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#define GPT_ENABLE 0x31
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static void __init mediatek_timer_init(void)
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{
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void __iomem *gpt_base;
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if (of_machine_is_compatible("mediatek,mt6589") ||
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of_machine_is_compatible("mediatek,mt8135") ||
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of_machine_is_compatible("mediatek,mt8127")) {
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/* turn on GPT6 which ungates arch timer clocks */
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gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
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/* enable clock and set to free-run */
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writel(GPT_ENABLE, gpt_base);
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iounmap(gpt_base);
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}
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of_clk_init(NULL);
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clocksource_probe();
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};
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static const char * const mediatek_board_dt_compat[] = {
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"mediatek,mt2701",
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"mediatek,mt6589",
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"mediatek,mt6592",
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"mediatek,mt8127",
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"mediatek,mt8135",
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NULL,
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};
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DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
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.dt_compat = mediatek_board_dt_compat,
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.init_time = mediatek_timer_init,
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MACHINE_END
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