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33a7808ce1
linux/drivers/gpu/drm/msm/dsi/phy
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Konrad Dybcio 33a7808ce1 drm/msm/dsi: Correct io_start for MSM8994 (20nm PHY) 
The previous registers were *almost* correct, but instead of
PHYs, they were pointing at DSI PLLs, resulting in the PHY id
autodetection failing miserably.

Fixes: dcefc117cc ("drm/msm/dsi: Add support for msm8x94")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-01-31 11:34:36 -08:00
..
dsi_phy_7nm.c drm/msm/dsi_phy_7nm: implement PHY disabling 2020-11-04 08:26:26 -08:00
dsi_phy_10nm.c drm/msm/dsi_phy_10nm: implement PHY disabling 2020-11-04 08:26:26 -08:00
dsi_phy_14nm.c drm/msm/dsi: Add phy configuration for SDM630/636/660 2020-07-31 06:46:17 -07:00
dsi_phy_20nm.c drm/msm/dsi: Correct io_start for MSM8994 (20nm PHY) 2021-01-31 11:34:36 -08:00
dsi_phy_28nm_8960.c drm/msm: drop use of drmP.h 2019-09-03 16:16:57 -07:00
dsi_phy_28nm.c drm/msm/dsi: Add configuration for 28nm PLL on family B 2019-11-04 13:17:42 -08:00
dsi_phy.c drm/msm/dsi: add support for 7nm DSI PHY/PLL 2020-09-12 09:59:58 -07:00
dsi_phy.h drm/msm/dsi: add support for 7nm DSI PHY/PLL 2020-09-12 09:59:58 -07:00