forked from Minki/linux
5c73cc4b6c
As always, this tends to be one of our bigger branches. There are lots of
updates this release, but not that many jumps out as something that needs
more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- More graphics DT pieces falling into place on Exynos, bridges, clocks.
- Plenty of DT updates for Qualcomm platforms for various IP blocks
- Some churn on Tegra due to switch-over to tool-generated pinctrl data
- Misc fixes and updates for Atmel at91 platforms
- Various DT updates to add IP block support on Broadcom's Cygnus platforms
- More updates for Renesas platforms as DT support is added for various IP
blocks (IPMMU, display, audio, etc).
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As always, this tends to be one of our bigger branches. There are
lots of updates this release, but not that many jumps out as something
that needs more detailed coverage. Some of the highlights are:
- DTs for the new Annapurna Labs Alpine platform
- more graphics DT pieces falling into place on Exynos, bridges,
clocks.
- plenty of DT updates for Qualcomm platforms for various IP blocks
- some churn on Tegra due to switch-over to tool-generated pinctrl
data
- misc fixes and updates for Atmel at91 platforms
- various DT updates to add IP block support on Broadcom's Cygnus
platforms
- more updates for Renesas platforms as DT support is added for
various IP blocks (IPMMU, display, audio, etc)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits)
ARM: dts: alpine: add internal pci
Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135."
ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
ARM: dts: qcom: Add idle state device nodes for 8064
ARM: dts: qcom: Add idle states device nodes for 8084
ARM: dts: qcom: Add idle states device nodes for 8974/8074
ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs
ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs
devicetree: bindings: Document qcom,idle-states
devicetree: bindings: Update qcom,saw2 node bindings
dt-bindings: Add #defines for MSM8916 clocks and resets
arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree
arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes
arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes
arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
arm: dts: qcom: Add LCC nodes
arm: dts: qcom: Add TCSR support for MSM8960
arm: dts: qcom: Add TCSR support for MSM8660
arm: dts: qcom: Add TCSR support for IPQ8064
...
489 lines
11 KiB
Plaintext
489 lines
11 KiB
Plaintext
/*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/omap.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,dm816";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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ethernet0 = ð0;
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ethernet1 = ð1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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/*
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* XXX: Use a flat representation of the dm816x interconnect.
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* The real dm816x interconnect network is quite complex. Since
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* it will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "ti,omap3-l3-smx", "simple-bus";
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reg = <0x44000000 0x10000>;
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interrupts = <9 10>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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prcm: prcm@48180000 {
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compatible = "ti,dm816-prcm";
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reg = <0x48180000 0x4000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@48140000 {
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compatible = "ti,dm816-scrm", "simple-bus";
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reg = <0x48140000 0x21000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x48140000 0x21000>;
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dm816x_pinmux: pinmux@800 {
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compatible = "pinctrl-single";
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reg = <0x800 0x50a>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xf>;
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};
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/* Device Configuration Registers */
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scm_conf: syscon@600 {
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compatible = "syscon", "simple-bus";
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reg = <0x600 0x110>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x600 0x110>;
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usb_phy0: usb-phy@20 {
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compatible = "ti,dm8168-usb-phy";
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reg = <0x20 0x8>;
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reg-names = "phy";
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clocks = <&main_fapll 6>;
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clock-names = "refclk";
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#phy-cells = <0>;
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syscon = <&scm_conf>;
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};
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usb_phy1: usb-phy@28 {
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compatible = "ti,dm8168-usb-phy";
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reg = <0x28 0x8>;
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reg-names = "phy";
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clocks = <&main_fapll 6>;
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clock-names = "refclk";
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#phy-cells = <0>;
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syscon = <&scm_conf>;
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};
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};
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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edma: edma@49000000 {
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
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reg = <0x49000000 0x10000>,
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<0x44e10f90 0x40>;
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interrupts = <12 13 14>;
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#dma-cells = <1>;
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};
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elm: elm@48080000 {
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compatible = "ti,816-elm";
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ti,hwmods = "elm";
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reg = <0x48080000 0x2000>;
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interrupts = <4>;
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};
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gpio1: gpio@48032000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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ti,gpio-always-on;
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reg = <0x48032000 0x1000>;
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interrupts = <96>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@4804c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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ti,gpio-always-on;
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reg = <0x4804c000 0x1000>;
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interrupts = <98>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpmc: gpmc@50000000 {
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compatible = "ti,am3352-gpmc";
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ti,hwmods = "gpmc";
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reg = <0x50000000 0x2000>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupts = <100>;
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gpmc,num-cs = <6>;
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gpmc,num-waitpins = <2>;
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};
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i2c1: i2c@48028000 {
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compatible = "ti,omap4-i2c";
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ti,hwmods = "i2c1";
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reg = <0x48028000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <70>;
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dmas = <&edma 58 &edma 59>;
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dma-names = "tx", "rx";
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};
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i2c2: i2c@4802a000 {
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compatible = "ti,omap4-i2c";
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ti,hwmods = "i2c2";
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reg = <0x4802a000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <71>;
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dmas = <&edma 60 &edma 61>;
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dma-names = "tx", "rx";
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};
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intc: interrupt-controller@48200000 {
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compatible = "ti,dm816-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x48200000 0x1000>;
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};
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mailbox: mailbox@480c8000 {
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compatible = "ti,omap4-mailbox";
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reg = <0x480c8000 0x2000>;
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interrupts = <77>;
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ti,hwmods = "mailbox";
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <12>;
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mbox_dsp: mbox_dsp {
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ti,mbox-tx = <3 0 0>;
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ti,mbox-rx = <0 0 0>;
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};
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};
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mdio: mdio@4a100800 {
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compatible = "ti,davinci_mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x4a100800 0x100>;
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ti,hwmods = "davinci_mdio";
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bus_freq = <1000000>;
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phy0: ethernet-phy@0 {
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reg = <1>;
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};
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phy1: ethernet-phy@1 {
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reg = <2>;
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};
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};
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eth0: ethernet@4a100000 {
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compatible = "ti,dm816-emac";
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ti,hwmods = "emac0";
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reg = <0x4a100000 0x800
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0x4a100900 0x3700>;
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clocks = <&sysclk24_ck>;
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syscon = <&scm_conf>;
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ti,davinci-ctrl-reg-offset = <0>;
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ti,davinci-ctrl-mod-reg-offset = <0x900>;
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ti,davinci-ctrl-ram-offset = <0x2000>;
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ti,davinci-ctrl-ram-size = <0x2000>;
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interrupts = <40 41 42 43>;
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phy-handle = <&phy0>;
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};
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eth1: ethernet@4a120000 {
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compatible = "ti,dm816-emac";
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ti,hwmods = "emac1";
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reg = <0x4a120000 0x4000>;
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clocks = <&sysclk24_ck>;
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syscon = <&scm_conf>;
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ti,davinci-ctrl-reg-offset = <0>;
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ti,davinci-ctrl-mod-reg-offset = <0x900>;
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ti,davinci-ctrl-ram-offset = <0x2000>;
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ti,davinci-ctrl-ram-size = <0x2000>;
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interrupts = <44 45 46 47>;
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phy-handle = <&phy1>;
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};
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mcspi1: spi@48030000 {
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compatible = "ti,omap4-mcspi";
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reg = <0x48030000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <65>;
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ti,spi-num-cs = <4>;
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ti,hwmods = "mcspi1";
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dmas = <&edma 16 &edma 17
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&edma 18 &edma 19>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x48060000 0x11000>;
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ti,hwmods = "mmc1";
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interrupts = <64>;
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dmas = <&edma 24 &edma 25>;
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dma-names = "tx", "rx";
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};
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timer1: timer@4802e000 {
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compatible = "ti,dm816-timer";
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reg = <0x4802e000 0x2000>;
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interrupts = <67>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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timer2: timer@48040000 {
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compatible = "ti,dm816-timer";
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reg = <0x48040000 0x2000>;
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interrupts = <68>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,dm816-timer";
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reg = <0x48042000 0x2000>;
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interrupts = <69>;
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ti,hwmods = "timer3";
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};
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timer4: timer@48044000 {
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compatible = "ti,dm816-timer";
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reg = <0x48044000 0x2000>;
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interrupts = <92>;
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ti,hwmods = "timer4";
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};
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timer5: timer@48046000 {
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compatible = "ti,dm816-timer";
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reg = <0x48046000 0x2000>;
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interrupts = <93>;
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ti,hwmods = "timer5";
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};
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timer6: timer@48048000 {
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compatible = "ti,dm816-timer";
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reg = <0x48048000 0x2000>;
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interrupts = <94>;
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ti,hwmods = "timer6";
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};
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timer7: timer@4804a000 {
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compatible = "ti,dm816-timer";
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reg = <0x4804a000 0x2000>;
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interrupts = <95>;
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ti,hwmods = "timer7";
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};
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uart1: uart@48020000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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reg = <0x48020000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <72>;
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dmas = <&edma 26 &edma 27>;
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dma-names = "tx", "rx";
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};
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uart2: uart@48022000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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reg = <0x48022000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <73>;
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dmas = <&edma 28 &edma 29>;
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dma-names = "tx", "rx";
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};
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uart3: uart@48024000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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reg = <0x48024000 0x2000>;
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clock-frequency = <48000000>;
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interrupts = <74>;
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dmas = <&edma 30 &edma 31>;
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dma-names = "tx", "rx";
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};
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/* NOTE: USB needs a transceiver driver for phys to work */
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usb: usb_otg_hs@47401000 {
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compatible = "ti,am33xx-usb";
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reg = <0x47401000 0x400000>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "usb_otg_hs";
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usb0: usb@47401000 {
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compatible = "ti,musb-am33xx";
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reg = <0x47401400 0x400
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0x47401000 0x200>;
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reg-names = "mc", "control";
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interrupts = <18>;
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interrupt-names = "mc";
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dr_mode = "host";
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interface-type = <0>;
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phys = <&usb_phy0>;
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phy-names = "usb2-phy";
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mentor,multipoint = <1>;
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mentor,num-eps = <16>;
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mentor,ram-bits = <12>;
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mentor,power = <500>;
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dmas = <&cppi41dma 0 0 &cppi41dma 1 0
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&cppi41dma 2 0 &cppi41dma 3 0
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&cppi41dma 4 0 &cppi41dma 5 0
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&cppi41dma 6 0 &cppi41dma 7 0
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&cppi41dma 8 0 &cppi41dma 9 0
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&cppi41dma 10 0 &cppi41dma 11 0
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&cppi41dma 12 0 &cppi41dma 13 0
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&cppi41dma 14 0 &cppi41dma 0 1
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&cppi41dma 1 1 &cppi41dma 2 1
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&cppi41dma 3 1 &cppi41dma 4 1
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&cppi41dma 5 1 &cppi41dma 6 1
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&cppi41dma 7 1 &cppi41dma 8 1
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&cppi41dma 9 1 &cppi41dma 10 1
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&cppi41dma 11 1 &cppi41dma 12 1
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&cppi41dma 13 1 &cppi41dma 14 1>;
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dma-names =
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"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
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"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
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"rx14", "rx15",
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"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
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"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
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"tx14", "tx15";
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};
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|
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usb1: usb@47401800 {
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compatible = "ti,musb-am33xx";
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|
reg = <0x47401c00 0x400
|
|
0x47401800 0x200>;
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|
reg-names = "mc", "control";
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|
interrupts = <19>;
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|
interrupt-names = "mc";
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|
dr_mode = "host";
|
|
interface-type = <0>;
|
|
phys = <&usb_phy1>;
|
|
phy-names = "usb2-phy";
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|
mentor,multipoint = <1>;
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|
mentor,num-eps = <16>;
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|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
|
|
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
|
|
&cppi41dma 17 0 &cppi41dma 18 0
|
|
&cppi41dma 19 0 &cppi41dma 20 0
|
|
&cppi41dma 21 0 &cppi41dma 22 0
|
|
&cppi41dma 23 0 &cppi41dma 24 0
|
|
&cppi41dma 25 0 &cppi41dma 26 0
|
|
&cppi41dma 27 0 &cppi41dma 28 0
|
|
&cppi41dma 29 0 &cppi41dma 15 1
|
|
&cppi41dma 16 1 &cppi41dma 17 1
|
|
&cppi41dma 18 1 &cppi41dma 19 1
|
|
&cppi41dma 20 1 &cppi41dma 21 1
|
|
&cppi41dma 22 1 &cppi41dma 23 1
|
|
&cppi41dma 24 1 &cppi41dma 25 1
|
|
&cppi41dma 26 1 &cppi41dma 27 1
|
|
&cppi41dma 28 1 &cppi41dma 29 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
cppi41dma: dma-controller@47402000 {
|
|
compatible = "ti,am3359-cppi41";
|
|
reg = <0x47400000 0x1000
|
|
0x47402000 0x1000
|
|
0x47403000 0x1000
|
|
0x47404000 0x4000>;
|
|
reg-names = "glue", "controller", "scheduler", "queuemgr";
|
|
interrupts = <17>;
|
|
interrupt-names = "glue";
|
|
#dma-cells = <2>;
|
|
#dma-channels = <30>;
|
|
#dma-requests = <256>;
|
|
};
|
|
};
|
|
|
|
wd_timer2: wd_timer@480c2000 {
|
|
compatible = "ti,omap3-wdt";
|
|
ti,hwmods = "wd_timer";
|
|
reg = <0x480c2000 0x1000>;
|
|
interrupts = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
#include "dm816x-clocks.dtsi"
|