forked from Minki/linux
2d75588a28
Add a new R-Car E2 Clock Pulse Generator / Module Standby and Software Reset driver, using the CPG/MSSR driver core. This will enable support for module resets, which are not supported by the existing driver. The old driver can still be used through a Kconfig option, to preserve backward compatibility with old DTBs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
130 lines
2.5 KiB
Plaintext
130 lines
2.5 KiB
Plaintext
config CLK_RENESAS
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bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
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default y if ARCH_RENESAS
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select CLK_EMEV2 if ARCH_EMEV2
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select CLK_RZA1 if ARCH_R7S72100
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select CLK_R8A73A4 if ARCH_R8A73A4
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select CLK_R8A7740 if ARCH_R8A7740
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select CLK_R8A7743 if ARCH_R8A7743
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select CLK_R8A7745 if ARCH_R8A7745
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select CLK_R8A7778 if ARCH_R8A7778
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select CLK_R8A7779 if ARCH_R8A7779
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select CLK_R8A7790 if ARCH_R8A7790
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select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
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select CLK_R8A7792 if ARCH_R8A7792
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select CLK_R8A7794 if ARCH_R8A7794
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select CLK_R8A7795 if ARCH_R8A7795
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select CLK_R8A7796 if ARCH_R8A7796
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select CLK_SH73A0 if ARCH_SH73A0
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if CLK_RENESAS
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config CLK_RENESAS_LEGACY
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bool "Legacy DT clock support"
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depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794
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default y
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help
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Enable backward compatibility with old device trees describing a
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hierarchical representation of the various CPG and MSTP clocks.
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Say Y if you want your kernel to work with old DTBs.
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# SoC
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config CLK_EMEV2
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bool "Emma Mobile EV2 clock support" if COMPILE_TEST
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config CLK_RZA1
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bool
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A73A4
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bool
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_R8A7740
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bool
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_R8A7743
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bool
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7745
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bool
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7778
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bool
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A7779
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bool
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A7790
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bool
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7791
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bool
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7792
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bool
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7794
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bool
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7795
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bool
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select CLK_RCAR_GEN3_CPG
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config CLK_R8A7796
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bool
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select CLK_RCAR_GEN3_CPG
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config CLK_SH73A0
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bool
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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# Family
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config CLK_RCAR_GEN2
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bool
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_RCAR_GEN2_CPG
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bool
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select CLK_RENESAS_CPG_MSSR
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config CLK_RCAR_GEN3_CPG
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bool
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select CLK_RENESAS_CPG_MSSR
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# Generic
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config CLK_RENESAS_CPG_MSSR
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bool
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select CLK_RENESAS_DIV6
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config CLK_RENESAS_CPG_MSTP
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bool
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config CLK_RENESAS_DIV6
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bool "DIV6 clock support" if COMPILE_TEST
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endif # CLK_RENESAS
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