forked from Minki/linux
f5e706ad88
With this commit all sparc64 header files are moved to asm-sparc. The remaining files (71 files) were too different to be trivially merged so divide them up in a _32.h and a _64.h file which are both included from the file with no bit size. The following script were used: cd include FILES=`wc -l asm-sparc64/*h | grep -v '^ 1' | cut -b 20-` for FILE in ${FILES}; do echo $FILE: BASE=`echo $FILE | cut -d '.' -f 1` FN32=${BASE}_32.h FN64=${BASE}_64.h GUARD=___ASM_SPARC_`echo $BASE | tr '-' '_' | tr [:lower:] [:upper:]`_H git mv asm-sparc/$FILE asm-sparc/$FN32 git mv asm-sparc64/$FILE asm-sparc/$FN64 echo git mv done printf "#ifndef %s\n" $GUARD > asm-sparc/$FILE printf "#define %s\n" $GUARD >> asm-sparc/$FILE printf "#if defined(__sparc__) && defined(__arch64__)\n" >> asm-sparc/$FILE printf "#include <asm-sparc/%s>\n" $FN64 >> asm-sparc/$FILE printf "#else\n" >> asm-sparc/$FILE printf "#include <asm-sparc/%s>\n" $FN32 >> asm-sparc/$FILE printf "#endif\n" >> asm-sparc/$FILE printf "#endif\n" >> asm-sparc/$FILE git add asm-sparc/$FILE echo new file done printf "#include <asm-sparc/%s>\n" $FILE > asm-sparc64/$FILE git add asm-sparc64/$FILE echo sparc64 file done done The guard contains three '_' to avoid conflict with existing guards. In additing the two Kbuild files are emptied to avoid breaking headers_* targets. We will reintroduce the exported header files when the necessary kbuild changes are merged. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
103 lines
3.5 KiB
C
103 lines
3.5 KiB
C
#ifndef __SPARC_HEAD_H
|
|
#define __SPARC_HEAD_H
|
|
|
|
#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */
|
|
#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */
|
|
#define SUN4C_SEGSZ (1 << 18)
|
|
#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */
|
|
#define INTS_ENAB 0x01 /* entry.S uses this. */
|
|
|
|
#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */
|
|
|
|
#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
|
|
#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */
|
|
|
|
/* Here are some trap goodies */
|
|
|
|
/* Generic trap entry. */
|
|
#define TRAP_ENTRY(type, label) \
|
|
rd %psr, %l0; b label; rd %wim, %l3; nop;
|
|
|
|
/* Data/text faults. Defaults to sun4c version at boot time. */
|
|
#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
|
|
#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
|
|
#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
|
|
#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
|
|
|
|
/* This is for traps we should NEVER get. */
|
|
#define BAD_TRAP(num) \
|
|
rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
|
|
|
|
/* This is for traps when we want just skip the instruction which caused it */
|
|
#define SKIP_TRAP(type, name) \
|
|
jmpl %l2, %g0; rett %l2 + 4; nop; nop;
|
|
|
|
/* Notice that for the system calls we pull a trick. We load up a
|
|
* different pointer to the system call vector table in %l7, but call
|
|
* the same generic system call low-level entry point. The trap table
|
|
* entry sequences are also HyperSparc pipeline friendly ;-)
|
|
*/
|
|
|
|
/* Software trap for Linux system calls. */
|
|
#define LINUX_SYSCALL_TRAP \
|
|
sethi %hi(sys_call_table), %l7; \
|
|
or %l7, %lo(sys_call_table), %l7; \
|
|
b linux_sparc_syscall; \
|
|
rd %psr, %l0;
|
|
|
|
#define BREAKPOINT_TRAP \
|
|
b breakpoint_trap; \
|
|
rd %psr,%l0; \
|
|
nop; \
|
|
nop;
|
|
|
|
#ifdef CONFIG_KGDB
|
|
#define KGDB_TRAP(num) \
|
|
b kgdb_trap_low; \
|
|
rd %psr,%l0; \
|
|
nop; \
|
|
nop;
|
|
#else
|
|
#define KGDB_TRAP(num) \
|
|
BAD_TRAP(num)
|
|
#endif
|
|
|
|
/* The Get Condition Codes software trap for userland. */
|
|
#define GETCC_TRAP \
|
|
b getcc_trap_handler; mov %psr, %l0; nop; nop;
|
|
|
|
/* The Set Condition Codes software trap for userland. */
|
|
#define SETCC_TRAP \
|
|
b setcc_trap_handler; mov %psr, %l0; nop; nop;
|
|
|
|
/* The Get PSR software trap for userland. */
|
|
#define GETPSR_TRAP \
|
|
mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
|
|
|
|
/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
|
|
* gets handled with another macro.
|
|
*/
|
|
#define TRAP_ENTRY_INTERRUPT(int_level) \
|
|
mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
|
|
|
|
/* NMI's (Non Maskable Interrupts) are special, you can't keep them
|
|
* from coming in, and basically if you get one, the shows over. ;(
|
|
* On the sun4c they are usually asynchronous memory errors, on the
|
|
* the sun4m they could be either due to mem errors or a software
|
|
* initiated interrupt from the prom/kern on an SMP box saying "I
|
|
* command you to do CPU tricks, read your mailbox for more info."
|
|
*/
|
|
#define NMI_TRAP \
|
|
rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
|
|
|
|
/* Window overflows/underflows are special and we need to try to be as
|
|
* efficient as possible here....
|
|
*/
|
|
#define WINDOW_SPILL \
|
|
rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
|
|
|
|
#define WINDOW_FILL \
|
|
rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
|
|
|
|
#endif /* __SPARC_HEAD_H */
|