linux/drivers/gpu/drm/amd/include/ivsrcid/ivsrcid_vislands30.h

/*
 * Volcanic Islands IV SRC Register documentation
 *
 * Copyright (C) 2015  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _IVSRCID_VISLANDS30_H_
#define _IVSRCID_VISLANDS30_H_


// IV Source IDs

#define VISLANDS30_IV_SRCID_D1_V_UPDATE_INT		            7	    // 0x07	
#define VISLANDS30_IV_EXTID_D1_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D1_GRPH_PFLIP		            8	    // 0x08	
#define VISLANDS30_IV_EXTID_D1_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D2_V_UPDATE_INT		            9	    // 0x09	
#define VISLANDS30_IV_EXTID_D2_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D2_GRPH_PFLIP  		            10	    // 0x0a	
#define VISLANDS30_IV_EXTID_D2_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D3_V_UPDATE_INT		            11	    // 0x0b	
#define VISLANDS30_IV_EXTID_D3_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D3_GRPH_PFLIP		            12	    // 0x0c	
#define VISLANDS30_IV_EXTID_D3_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D4_V_UPDATE_INT		            13	    // 0x0d  	
#define VISLANDS30_IV_EXTID_D4_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D4_GRPH_PFLIP		            14	    // 0x0e  	
#define VISLANDS30_IV_EXTID_D4_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D5_V_UPDATE_INT		            15	    // 0x0f	
#define VISLANDS30_IV_EXTID_D5_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D5_GRPH_PFLIP		            16	    // 0x10  	
#define VISLANDS30_IV_EXTID_D5_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D6_V_UPDATE_INT		            17	    // 0x11      	
#define VISLANDS30_IV_EXTID_D6_V_UPDATE_INT                  0

#define VISLANDS30_IV_SRCID_D6_GRPH_PFLIP		            18	    // 0x12  	
#define VISLANDS30_IV_EXTID_D6_GRPH_PFLIP                    0

#define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT0           19      // 0x13
#define VISLANDS30_IV_EXTID_D1_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT1           19      // 0x13
#define VISLANDS30_IV_EXTID_D1_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT2           19      // 0x13
#define VISLANDS30_IV_EXTID_D1_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SYNC_LOSS          19      // 0x13
#define VISLANDS30_IV_EXTID_D1_EXT_TIMING_SYNC_LOSS          10

#define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SYNC               19      // 0x13
#define VISLANDS30_IV_EXTID_D1_EXT_TIMING_SYNC               11

#define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SIGNAL             19      // 0x13
#define VISLANDS30_IV_EXTID_D1_EXT_TIMING_SIGNAL             12

#define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT0           20      // 0x14
#define VISLANDS30_IV_EXTID_D2_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT1           20      // 0x14
#define VISLANDS30_IV_EXTID_D2_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT2           20      // 0x14
#define VISLANDS30_IV_EXTID_D2_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SYNC_LOSS          20      // 0x14
#define VISLANDS30_IV_EXTID_D2_EXT_TIMING_SYNC_LOSS          10

#define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SYNC               20      // 0x14
#define VISLANDS30_IV_EXTID_D2_EXT_TIMING_SYNC               11

#define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SIGNAL             20      // 0x14
#define VISLANDS30_IV_EXTID_D2_EXT_TIMING_SIGNAL             12

#define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT0           21      // 0x15
#define VISLANDS30_IV_EXTID_D3_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT1           21      // 0x15
#define VISLANDS30_IV_EXTID_D3_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT2           21      // 0x15
#define VISLANDS30_IV_EXTID_D3_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SYNC_LOSS          21      // 0x15
#define VISLANDS30_IV_EXTID_D3_EXT_TIMING_SYNC_LOSS          10

#define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SYNC               21      // 0x15
#define VISLANDS30_IV_EXTID_D3_EXT_TIMING_SYNC               11

#define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SIGNAL             21      // 0x15
#define VISLANDS30_IV_EXTID_D3_EXT_TIMING_SIGNAL             12

#define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT0           22      // 0x16
#define VISLANDS30_IV_EXTID_D4_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT1           22      // 0x16
#define VISLANDS30_IV_EXTID_D4_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT2           22      // 0x16
#define VISLANDS30_IV_EXTID_D4_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SYNC_LOSS          22      // 0x16
#define VISLANDS30_IV_EXTID_D4_EXT_TIMING_SYNC_LOSS          10

#define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SYNC               22      // 0x16
#define VISLANDS30_IV_EXTID_D4_EXT_TIMING_SYNC               11

#define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SIGNAL             22      // 0x16
#define VISLANDS30_IV_EXTID_D4_EXT_TIMING_SIGNAL             12

#define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT0           23      // 0x17
#define VISLANDS30_IV_EXTID_D5_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT1           23      // 0x17
#define VISLANDS30_IV_EXTID_D5_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT2           23      // 0x17
#define VISLANDS30_IV_EXTID_D5_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SYNC_LOSS          23      // 0x17
#define VISLANDS30_IV_EXTID_D5_EXT_TIMING_SYNC_LOSS          10

#define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SYNC               23      // 0x17
#define VISLANDS30_IV_EXTID_D5_EXT_TIMING_SYNC               11

#define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SIGNAL             23      // 0x17
#define VISLANDS30_IV_EXTID_D5_EXT_TIMING_SIGNAL             12

#define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT0           24      // 0x18
#define VISLANDS30_IV_EXTID_D6_VERTICAL_INTERRUPT0           7

#define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT1           24      // 0x18
#define VISLANDS30_IV_EXTID_D6_VERTICAL_INTERRUPT1           8

#define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT2           24      // 0x18
#define VISLANDS30_IV_EXTID_D6_VERTICAL_INTERRUPT2           9

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A		            42	    // 0x2a	
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_A                 0

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_B   		        42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_B                 1

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_C   		        42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_C                 2

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_D	    	        42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_D                 3

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_E		            42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_E                 4

#define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_F		            42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_F                 5

#define VISLANDS30_IV_SRCID_HPD_RX_A		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_A                         6

#define VISLANDS30_IV_SRCID_HPD_RX_B		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_B                         7

#define VISLANDS30_IV_SRCID_HPD_RX_C		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_C                         8

#define VISLANDS30_IV_SRCID_HPD_RX_D		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_D                         9

#define VISLANDS30_IV_SRCID_HPD_RX_E		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_E                         10

#define VISLANDS30_IV_SRCID_HPD_RX_F		                    42	    // 0x2a		
#define VISLANDS30_IV_EXTID_HPD_RX_F                         11

#endif // _IVSRCID_VISLANDS30_H_