forked from Minki/linux
3d33cb5ad5
We introduced recently a new compatible to deal with the A64 eMMC controller, let's document its binding. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
50 lines
1.5 KiB
Plaintext
50 lines
1.5 KiB
Plaintext
* Allwinner sunxi MMC controller
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The highspeed MMC host controller on Allwinner SoCs provides an interface
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for MMC, SD and SDIO types of memory cards.
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Supported maximum speeds are the ones of the eMMC standard 4.5 as well
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as the speed of SD standard 3.0.
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Absolute maximum transfer rate is 200MB/s
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Required properties:
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- compatible : should be one of:
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* "allwinner,sun4i-a10-mmc"
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* "allwinner,sun5i-a13-mmc"
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* "allwinner,sun7i-a20-mmc"
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* "allwinner,sun9i-a80-mmc"
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* "allwinner,sun50i-a64-emmc"
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* "allwinner,sun50i-a64-mmc"
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- reg : mmc controller base registers
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- clocks : a list with 4 phandle + clock specifier pairs
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- clock-names : must contain "ahb", "mmc", "output" and "sample"
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- interrupts : mmc controller interrupt
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Optional properties:
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- resets : phandle + reset specifier pair
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- reset-names : must contain "ahb"
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- for cd, bus-width and additional generic mmc parameters
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please refer to mmc.txt within this directory
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Examples:
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- Within .dtsi:
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mmc0: mmc@01c0f000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c0f000 0x1000>;
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clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
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clock-names = "ahb", "mod", "output", "sample";
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interrupts = <0 32 4>;
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status = "disabled";
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};
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- Within dts:
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default", "default";
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pinctrl-0 = <&mmc0_pins_a>;
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pinctrl-1 = <&mmc0_cd_pin_reference_design>;
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bus-width = <4>;
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cd-gpios = <&pio 7 1 0>; /* PH1 */
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cd-inverted;
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status = "okay";
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};
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