Guchun Chen 7551f70ab9 drm/amdgpu: fix the missed handling for SDMA2 and SDMA3 ...

There is no base reg offset or ip_version set for SDMA2
and SDMA3 on SIENNA_CICHLID, so add them.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-12-01 17:00:55 -05:00

40 KiB

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