30b435d54b
The descriptions for the spi-rx-bus-width and spi-tx-bus-width properties refer to "MISO" and "MOSI", which are not explained in the document. While these abbreviations are fairly common when talking about SPI, and thus may not need an explanation, they are not entirely correct in this context, as the SPI controller may be used in slave mode instead of master mode. Fix this by replacing them by "read transfers" resp. "write transfers", like is done for the spi-rx-delay-us and spi-tx-delay-us properties. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200306085038.8111-3-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
167 lines
4.1 KiB
YAML
167 lines
4.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-controller.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SPI Controller Generic Binding
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maintainers:
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- Mark Brown <broonie@kernel.org>
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description: |
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SPI busses can be described with a node for the SPI controller device
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and a set of child nodes for each SPI slave on the bus. The system SPI
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controller may be described for use in SPI master mode or in SPI slave mode,
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but not for both at the same time.
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properties:
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$nodename:
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pattern: "^spi(@.*|-[0-9a-f])*$"
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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cs-gpios:
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description: |
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GPIOs used as chip selects.
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If that property is used, the number of chip selects will be
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increased automatically with max(cs-gpios, hardware chip selects).
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So if, for example, the controller has 4 CS lines, and the
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cs-gpios looks like this
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cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
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Then it should be configured so that num_chipselect = 4, with
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the following mapping
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cs0 : &gpio1 0 0
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cs1 : native
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cs2 : &gpio1 1 0
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cs3 : &gpio1 2 0
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num-cs:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Total number of chip selects.
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spi-slave:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The SPI controller acts as a slave, instead of a master.
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oneOf:
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- required:
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- "#address-cells"
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- required:
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- spi-slave
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patternProperties:
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"^slave$":
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type: object
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properties:
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compatible:
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description:
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Compatible of the SPI device.
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required:
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- compatible
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"^.*@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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description:
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Compatible of the SPI device.
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reg:
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minimum: 0
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maximum: 256
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description:
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Chip select used by the device.
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spi-3wire:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires 3-wire mode.
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spi-cpha:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires shifted clock phase (CPHA) mode.
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spi-cpol:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires inverse clock polarity (CPOL) mode.
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spi-cs-high:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires the chip select active high.
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spi-lsb-first:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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The device requires the LSB first mode.
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spi-max-frequency:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Maximum SPI clocking speed of the device in Hz.
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spi-rx-bus-width:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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- enum: [ 1, 2, 4, 8 ]
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- default: 1
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description:
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Bus width to the SPI bus used for read transfers.
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spi-rx-delay-us:
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description:
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Delay, in microseconds, after a read transfer.
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spi-tx-bus-width:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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- enum: [ 1, 2, 4, 8 ]
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- default: 1
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description:
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Bus width to the SPI bus used for write transfers.
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spi-tx-delay-us:
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description:
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Delay, in microseconds, after a write transfer.
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required:
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- compatible
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- reg
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examples:
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- |
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spi@f00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
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reg = <0xf00 0x20>;
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interrupts = <2 13 0 2 14 0>;
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interrupt-parent = <&mpc5200_pic>;
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ethernet-switch@0 {
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compatible = "micrel,ks8995m";
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spi-max-frequency = <1000000>;
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reg = <0>;
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};
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codec@1 {
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compatible = "ti,tlv320aic26";
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spi-max-frequency = <100000>;
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reg = <1>;
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};
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};
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