linux/arch/x86/kernel/cpu
Suresh Siddha 304bceda6a x86, fpu: use non-lazy fpu restore for processors supporting xsave
Fundamental model of the current Linux kernel is to lazily init and
restore FPU instead of restoring the task state during context switch.
This changes that fundamental lazy model to the non-lazy model for
the processors supporting xsave feature.

Reasons driving this model change are:

i. Newer processors support optimized state save/restore using xsaveopt and
xrstor by tracking the INIT state and MODIFIED state during context-switch.
This is faster than modifying the cr0.TS bit which has serializing semantics.

ii. Newer glibc versions use SSE for some of the optimized copy/clear routines.
With certain workloads (like boot, kernel-compilation etc), application
completes its work with in the first 5 task switches, thus taking upto 5 #DNA
traps with the kernel not getting a chance to apply the above mentioned
pre-load heuristic.

iii. Some xstate features (like AMD's LWP feature) don't honor the cr0.TS bit
and thus will not work correctly in the presence of lazy restore. Non-lazy
state restore is needed for enabling such features.

Some data on a two socket SNB system:
 * Saved 20K DNA exceptions during boot on a two socket SNB system.
 * Saved 50K DNA exceptions during kernel-compilation workload.
 * Improved throughput of the AVX based checksumming function inside the
   kernel by ~15% as xsave/xrstor is faster than the serializing clts/stts
   pair.

Also now kernel_fpu_begin/end() relies on the patched
alternative instructions. So move check_fpu() which uses the
kernel_fpu_begin/end() after alternative_instructions().

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Link: http://lkml.kernel.org/r/1345842782-24175-7-git-send-email-suresh.b.siddha@intel.com
Merge 32-bit boot fix from,
Link: http://lkml.kernel.org/r/1347300665-6209-4-git-send-email-suresh.b.siddha@intel.com
Cc: Jim Kukunas <james.t.kukunas@linux.intel.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Avi Kivity <avi@redhat.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2012-09-18 15:52:11 -07:00
..
mcheck Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2012-08-03 10:59:36 -07:00
mtrr x86/mm/mtrr: Slightly simplify print_mtrr_state() 2012-07-10 10:38:15 +02:00
.gitignore
amd.c x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe() 2012-06-07 13:32:04 -07:00
bugs_64.c
bugs.c x86, fpu: use non-lazy fpu restore for processors supporting xsave 2012-09-18 15:52:11 -07:00
centaur.c x86, centaur: Enable cx8 for VIA Eden too 2011-12-15 08:04:42 -08:00
common.c x86, avx: don't use avx instructions with "noxsave" boot param 2012-08-08 13:41:42 -07:00
cpu.h x86/tlb_info: get last level TLB entry number of CPU 2012-06-27 19:28:24 -07:00
cyrix.c
hypervisor.c x86, hyper: fix build with !CONFIG_KVM_GUEST 2012-07-18 17:01:48 -03:00
intel_cacheinfo.c x86/cache_info: Fix setup of l2/l3 ids 2012-05-07 15:27:37 +02:00
intel.c x86/tlb: add tlb_flushall_shift for specific CPU 2012-06-27 19:29:10 -07:00
Makefile Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2012-07-26 13:08:01 -07:00
match.c x86: Fix typo in MODULE_DEVICE_TABLE example: s/x86_cpu/x86cpu/ 2012-04-16 14:20:19 +02:00
mkcapflags.pl x86, cpufeature: Remove stray %s, add -w to mkcapflags.pl 2012-06-26 08:02:48 -07:00
mshyperv.c x86: Hyper-V: Integrate the clocksource with Hyper-V detection code 2011-09-08 10:33:59 +02:00
perf_event_amd_ibs.c perf/x86: Fix USER/KERNEL tagging of samples properly 2012-07-31 17:02:04 +02:00
perf_event_amd.c perf/x86/amd: Unify AMD's generic and family 15h pmus 2012-07-05 21:19:41 +02:00
perf_event_intel_ds.c perf/x86: Fix USER/KERNEL tagging of samples properly 2012-07-31 17:02:04 +02:00
perf_event_intel_lbr.c perf/x86: Add LBR software filter support for Intel CPUs 2012-03-05 14:55:42 +01:00
perf_event_intel_uncore.c perf/x86: Add Intel Westmere-EX uncore support 2012-08-13 19:01:04 +02:00
perf_event_intel_uncore.h perf/x86: Add Intel Westmere-EX uncore support 2012-08-13 19:01:04 +02:00
perf_event_intel.c perf/x86: disable PEBS on a guest entry. 2012-08-13 19:01:04 +02:00
perf_event_p4.c perf/x86: Rename Intel specific macros 2012-07-05 21:19:39 +02:00
perf_event_p6.c x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe() 2012-06-07 13:32:04 -07:00
perf_event.c perf/x86: Fix USER/KERNEL tagging of samples properly 2012-07-31 17:02:04 +02:00
perf_event.h perf/x86: Fix USER/KERNEL tagging of samples properly 2012-07-31 17:02:04 +02:00
perfctr-watchdog.c
powerflags.c x86: Report cpb and eff_freq_ro flags correctly 2011-12-15 08:14:49 +01:00
proc.c x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86' 2011-12-21 09:25:09 +01:00
rdrand.c x86, random: Verify RDRAND functionality and allow it to be disabled 2011-07-31 14:02:19 -07:00
scattered.c x86, cpufeature: Rename X86_FEATURE_DTS to X86_FEATURE_DTHERM 2012-06-25 09:01:15 -07:00
topology.c
transmeta.c
umc.c
vmware.c